DDR_SDRAM_controller DDR SDRAM controller VHDL sou

Title: DDR_SDRAM_controller

Category:
VHDL-FPGA-Verilog
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[PDF]
File Size:
129kb
Update:
2012-11-26
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xbl_xbl_xbl

Description: DDR SDRAM controller VHDL source code, including detailed design documents. The DDR, DCM, and SelectI/O

Downloaders recently: [More information of uploader xbl_xbl_xbl]

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File list (Check if you may need any files):

DDR SDRAM控制器2
................\ddr_verilog_xilinx
................\..................\define.v
................\..................\glbl.v
................\..................\mt46v4m16.v
................\..................\readme.txt
................\..................\string_decode_fn.v
................\..................\tb_top.v
................\..................\top.ucf
................\..................\top_func.v
................\ddr_xilinx.pdf

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