Other resource List Page 10101

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duodianjiaocha Downloaded：0: with more cross-Genetic algorithm, can choose the size of population, the mutation rate, chromosome cross-rate encoding and output, the output text.
Date : 2008-10-13 Size : 5.25kb User : flying840310
fencen Downloaded：0: layered with Genetic algorithms, low- and high-level parallel operations, choosing their own population size, mutation rate and the two-tier cross-rates, the results in text mode output.
Date : 2008-10-13 Size : 6.57kb User : flying840310
C51WirlessApplication Downloaded：0: wireless beeper complete design, circuit schematics, SCM source code, major chip device information. Internal Source : Wireless Encoder Decoder PT2262 SCM procedures, X25045 subroutine for reference.
Date : 2008-10-13 Size : 1.17mb User : 张黄敢
Desdll Downloaded：0: turning to the three documents DES.h, DES.c. KEY.c in C for the creation of a dynamic link library were added to the corresponding Header Files and, Source Files and had Desdll.h
Date : 2008-10-13 Size : 6.21kb User : flying840310
RadarAnalysisSoftware Downloaded：0: here for the use of VEE Pro development of the radar signal analysis software, the right equipment and radar analysis reference value
Date : 2008-10-13 Size : 3.05kb User : 孙蒙
Sigtest Downloaded：0: here for the use of VEE Pro development of the signal integrity analysis software for high-speed serial signal analysis reference value
Date : 2008-10-13 Size : 1.51kb User : 孙蒙
dct_p Downloaded：0: VHDL (hardware description language) wrote a two-dimensional 8* 8 discrete cosine transform (D CT) and the anti-transform (IDCT). fully synchronous design, low gate count. can be used for multimedia and print application
Date : 2008-10-13 Size : 32.22kb User : citybus
jaguar2s Downloaded：1: 8-1024 points FFT/IFFT transform, VHDL design, simulation, can easily integrated.
Date : 2008-10-13 Size : 268.56kb User : citybus
bbsky Downloaded：0: ADC clock, interrupt inquiries. Beginners can attack entry Microcontroller
Date : 2008-10-13 Size : 2.81kb User : 欧阳是
PCI_target Downloaded：0: prepared by the PCI VHDL code, PCI2.2 compatible Xillinx Virtex II and Spantan optimized route speed, 32-bit width, the whole objective functions.
Date : 2008-10-13 Size : 825.68kb User : citybus
VLSIrtl_spi Downloaded：0: Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.
Date : 2008-10-13 Size : 45.02kb User : citybus
DCMConverter Downloaded：0: do use the library DCMTK example, can read DICOM files, and displayed
Date : 2008-10-13 Size : 16.32kb User : 黃小儀

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