FPGA_ASIC design information source pool

100兆总线 时序分析法 .pdf
8051 IP.zip
Altare公司训练新人的练习题下载.exe
Altera下载电缆资料.zip
dds-design.v
DSPuva16.zip
FFT 源码.tar
fir.tar.gz
PCB知识基础(Cadence).rar
PCI 源码.tar
readme.txt
RISC Core.ZIP
SPI Core.ZIP
UART 源码 (lattice version).rar
uart 源码 (Verilog).zip
uart 源码 (VHDL).zip
uart16550.tar.gz

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