Introduction - If you have any usage issues, please Google them yourself
GAL16V8D based on a clock the whole logic of the code to open. Verilog prepared!
Packet : 77433653gal_16v8.rar filelist
gal_16v8\gal_16v8.v
gal_16v8\gal_16v8.qpf
gal_16v8\gal_16v8.qsf
gal_16v8\db\gal_16v8.db_info
gal_16v8\db\gal_16v8.sld_design_entry.sci
gal_16v8\db\gal_16v8.eco.cdb
gal_16v8\db
gal_16v8\gal_16v8.qws
gal_16v8