Packet : 115157716or1200.rar filelist
or1200\OpenJtag-brochure(070426)-4_CN.pdf
or1200\or1200_overview.pdf
or1200\P57.pdf
or1200\Readme.txt
or1200\WISHBONE IP核互联总线.pdf
or1200\syn\synopsys\run\README
or1200\syn\synopsys\run\CVS\Entries
or1200\syn\synopsys\run\CVS\Repository
or1200\syn\synopsys\run\CVS\Root
or1200\syn\synopsys\run\CVS
or1200\syn\synopsys\run
or1200\syn\synopsys\out\README
or1200\syn\synopsys\out\CVS\Entries
or1200\syn\synopsys\out\CVS\Repository
or1200\syn\synopsys\out\CVS\Root
or1200\syn\synopsys\out\CVS
or1200\syn\synopsys\out
or1200\syn\synopsys\log\README
or1200\syn\synopsys\log\CVS\Entries
or1200\syn\synopsys\log\CVS\Repository
or1200\syn\synopsys\log\CVS\Root
or1200\syn\synopsys\log\CVS
or1200\syn\synopsys\log
or1200\syn\synopsys\CVS\Entries
or1200\syn\synopsys\CVS\Repository
or1200\syn\synopsys\CVS\Root
or1200\syn\synopsys\CVS
or1200\syn\synopsys\bin\README
or1200\syn\synopsys\bin\read_design.inc
or1200\syn\synopsys\bin\run_syn
or1200\syn\synopsys\bin\top.scr
or1200\syn\synopsys\bin\CVS\Entries
or1200\syn\synopsys\bin\CVS\Repository
or1200\syn\synopsys\bin\CVS\Root
or1200\syn\synopsys\bin\CVS
or1200\syn\synopsys\bin
or1200\syn\synopsys
or1200\syn\scr\CVS\Entries
or1200\syn\scr\CVS\Repository
or1200\syn\scr\CVS\Root
or1200\syn\scr\CVS
or1200\syn\scr
or1200\syn\logs\CVS\Entries
or1200\syn\logs\CVS\Repository
or1200\syn\logs\CVS\Root
or1200\syn\logs\CVS
or1200\syn\logs
or1200\syn\gate\CVS\Entries
or1200\syn\gate\CVS\Repository
or1200\syn\gate\CVS\Root
or1200\syn\gate\CVS
or1200\syn\gate
or1200\syn\CVS\Entries
or1200\syn\CVS\Repository
or1200\syn\CVS\Root
or1200\syn\CVS
or1200\syn
or1200\sim\README
or1200\sim\CVS\Entries
or1200\sim\CVS\Repository
or1200\sim\CVS\Root
or1200\sim\CVS
or1200\sim
or1200\rtl\verilog\or1200_alu.v
or1200\rtl\verilog\or1200_amultp2_32x32.v
or1200\rtl\verilog\or1200_cfgr.v
or1200\rtl\verilog\or1200_cpu.v
or1200\rtl\verilog\or1200_ctrl.v
or1200\rtl\verilog\or1200_dc_fsm.v
or1200\rtl\verilog\or1200_dc_ram.v
or1200\rtl\verilog\or1200_dc_tag.v
or1200\rtl\verilog\or1200_dc_top.v
or1200\rtl\verilog\or1200_defines.v
or1200\rtl\verilog\or1200_dmmu_tlb.v
or1200\rtl\verilog\or1200_dmmu_top.v
or1200\rtl\verilog\or1200_dpram_256x32.v
or1200\rtl\verilog\or1200_dpram_32x32.v
or1200\rtl\verilog\or1200_du.v
or1200\rtl\verilog\or1200_except.v
or1200\rtl\verilog\or1200_freeze.v
or1200\rtl\verilog\or1200_genpc.v
or1200\rtl\verilog\or1200_gmultp2_32x32.v
or1200\rtl\verilog\or1200_ic_fsm.v
or1200\rtl\verilog\or1200_ic_ram.v
or1200\rtl\verilog\or1200_ic_tag.v
or1200\rtl\verilog\or1200_ic_top.v
or1200\rtl\verilog\or1200_if.v
or1200\rtl\verilog\or1200_immu_tlb.v
or1200\rtl\verilog\or1200_immu_top.v
or1200\rtl\verilog\or1200_iwb_biu.v
or1200\rtl\verilog\or1200_lsu.v
or1200\rtl\verilog\or1200_mem2reg.v
or1200\rtl\verilog\or1200_mult_mac.v
or1200\rtl\verilog\or1200_operandmuxes.v
or1200\rtl\verilog\or1200_pic.v
or1200\rtl\verilog\or1200_pm.v
or1200\rtl\verilog\or1200_qmem_top.v
or1200\rtl\verilog\or1200_reg2mem.v
or1200\rtl\verilog\or1200_rf.v
or1200\rtl\verilog\or1200_rfram_generic.v
or1200\rtl\verilog\or1200_sb.v
or1200\rtl\verilog\or1200_sb_fifo.v
or1200\rtl\verilog\or1200_spram_1024x32.v
or1200\rtl\verilog\or1200_spram_1024x32_bw.v
or1200\rtl\verilog\or1200_spram_1024x8.v
or1200\rtl\verilog\or1200_spram_128x32.v
or1200\rtl\verilog\or1200_spram_2048x32.v
or1200\rtl\verilog\or1200_spram_2048x32_bw.v
or1200\rtl\verilog\or1200_spram_2048x8.v
or1200\rtl\verilog\or1200_spram_256x21.v
or1200\rtl\verilog\or1200_spram_32x24.v
or1200\rtl\verilog\or1200_spram_512x20.v
or1200\rtl\verilog\or1200_spram_64x14.v
or1200\rtl\verilog\or1200_spram_64x22.v
or1200\rtl\verilog\or1200_spram_64x24.v
or1200\rtl\verilog\or1200_sprs.v
or1200\rtl\verilog\or1200_top.v
or1200\rtl\verilog\or1200_tpram_32x32.v
or1200\rtl\verilog\or1200_tt.v
or1200\rtl\verilog\or1200_wbmux.v
or1200\rtl\verilog\or1200_wb_biu.v
or1200\rtl\verilog\or1200_xcv_ram32x8d.v
or1200\rtl\verilog\timescale.v
or1200\rtl\verilog\CVS\Entries
or1200\rtl\verilog\CVS\Repository
or1200\rtl\verilog\CVS\Root
or1200\rtl\verilog\CVS
or1200\rtl\verilog
or1200\rtl\CVS\Entries
or1200\rtl\CVS\Repository
or1200\rtl\CVS\Root
or1200\rtl\CVS
or1200\rtl
or1200\lint\run\README
or1200\lint\run\CVS\Entries
or1200\lint\run\CVS\Repository
or1200\lint\run\CVS\Root
or1200\lint\run\CVS
or1200\lint\run
or1200\lint\log\README
or1200\lint\log\CVS\Entries
or1200\lint\log\CVS\Repository
or1200\lint\log\CVS\Root
or1200\lint\log\CVS
or1200\lint\log
or1200\lint\CVS\Entries
or1200\lint\CVS\Repository
or1200\lint\CVS\Root
or1200\lint\CVS
or1200\lint\bin\README
or1200\lint\bin\run_lint
or1200\lint\bin\CVS\Entries
or1200\lint\bin\CVS\Repository
or1200\lint\bin\CVS\Root
or1200\lint\bin\CVS
or1200\lint\bin
or1200\lint
or1200\lib\README
or1200\lib\CVS\Entries
or1200\lib\CVS\Repository
or1200\lib\CVS\Root
or1200\lib\CVS
or1200\lib
or1200\doc\or1200_spec.doc
or1200\doc\or1200_spec.pdf
or1200\doc\CVS\Entries
or1200\doc\CVS\Repository
or1200\doc\CVS\Root
or1200\doc\CVS
or1200\doc
or1200\CVS\Entries
or1200\CVS\Repository
or1200\CVS\Root
or1200\CVS
or1200\bench\README
or1200\bench\CVS\Entries
or1200\bench\CVS\Repository
or1200\bench\CVS\Root
or1200\bench\CVS
or1200\bench
or1200

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