Introduction - If you have any usage issues, please Google them yourself
The verilog interface program of EPM1270 and ram62256 is compiled with QuartusII
Packet : 2184026962256.rar filelist
62256接口\62256.asm.rpt
62256接口\62256.done
62256接口\62256.eda.rpt
62256接口\62256.fit.rpt
62256接口\62256.fit.smsg
62256接口\62256.fit.summary
62256接口\62256.flow.rpt
62256接口\62256.map.rpt
62256接口\62256.map.summary
62256接口\62256.pin
62256接口\62256.pof
62256接口\62256.qpf
62256接口\62256.qsf
62256接口\62256.qws
62256接口\62256.sim.rpt
62256接口\62256.tan.rpt
62256接口\62256.tan.summary
62256接口\62256.vwf
62256接口\db\62256.(0).cnf.cdb
62256接口\db\62256.(0).cnf.hdb
62256接口\db\62256.asm.qmsg
62256接口\db\62256.asm_labs.ddb
62256接口\db\62256.cbx.xml
62256接口\db\62256.cmp.cdb
62256接口\db\62256.cmp.hdb
62256接口\db\62256.cmp.kpt
62256接口\db\62256.cmp.logdb
62256接口\db\62256.cmp.rdb
62256接口\db\62256.cmp.tdb
62256接口\db\62256.cmp0.ddb
62256接口\db\62256.dbp
62256接口\db\62256.db_info
62256接口\db\62256.eco.cdb
62256接口\db\62256.eda.qmsg
62256接口\db\62256.eds_overflow
62256接口\db\62256.fit.qmsg
62256接口\db\62256.hier_info
62256接口\db\62256.hif
62256接口\db\62256.map.cdb
62256接口\db\62256.map.hdb
62256接口\db\62256.map.logdb
62256接口\db\62256.map.qmsg
62256接口\db\62256.pre_map.cdb
62256接口\db\62256.pre_map.hdb
62256接口\db\62256.psp
62256接口\db\62256.rtlv.hdb
62256接口\db\62256.rtlv_sg.cdb
62256接口\db\62256.rtlv_sg_swap.cdb
62256接口\db\62256.sgdiff.cdb
62256接口\db\62256.sgdiff.hdb
62256接口\db\62256.signalprobe.cdb
62256接口\db\62256.sim.hdb
62256接口\db\62256.sim.qmsg
62256接口\db\62256.sim.rdb
62256接口\db\62256.sim.vwf
62256接口\db\62256.sld_design_entry.sci
62256接口\db\62256.sld_design_entry_dsc.sci
62256接口\db\62256.syn_hier_info
62256接口\db\62256.tan.qmsg
62256接口\db\wed.zsf
62256接口\inter62256.v
62256接口\inter62256.v.bak
62256接口\serv_req_info.txt
62256接口\simulation\modelsim\62256.vo
62256接口\simulation\modelsim\62256_modelsim.xrf
62256接口\simulation\modelsim\62256_v.sdo
62256接口\Waveform1.vwf
62256接口\simulation\modelsim
62256接口\db
62256接口\simulation
62256接口