this program functions : DDS folder procedures, complete direct digital frequency synthesis, sine, triangle, Three square waveform, and can sweep. can be set up through the keyboard operation frequency waveform parameters and the types of choice and control operations. composed of two parts, "C" folder, for the 51 microcontroller running C Programming Language, "Verilog" folder, use the Verilog language FPGA procedures.

Packet : 3970985dds 51.rar filelist
DDS\DDS演示程序的操作说明.txt
DDS\c\display.LST
DDS\c\display.OBJ
DDS\c\display.c
DDS\c\display_drv.bpf
DDS\c\display_drv.h
DDS\c\font.h
DDS\c\font2.h
DDS\c\lxp
DDS\c\lxp.M51
DDS\c\lxp.Opt
DDS\c\lxp.Uv2
DDS\c\lxp.hex
DDS\c\lxp.lnp
DDS\c\lxp.plg
DDS\c\lxp_Opt.Bak
DDS\c\lxp_Uv2.Bak
DDS\c\pic1.h
DDS\c\ss_sweep.LST
DDS\c\ss_sweep.OBJ
DDS\c\ss_sweep.bpf
DDS\c\ss_sweep.c
DDS\verilog\CmdCtrl.sym
DDS\verilog\CmdCtrl.v
DDS\verilog\KBSCAN.sym
DDS\verilog\LIB.DLS
DDS\verilog\ModSel.sym
DDS\verilog\ModSel.v
DDS\verilog\U0586814.DLS
DDS\verilog\U0591925.DLS
DDS\verilog\U2993218.DLS
DDS\verilog\U3595094.DLS
DDS\verilog\U3764425.DLS
DDS\verilog\U4836290.DLS
DDS\verilog\U6488575.DLS
DDS\verilog\U7908037.DLS
DDS\verilog\U9244932.DLS
DDS\verilog\U9514177.DLS
DDS\verilog\cmdctrl.acf
DDS\verilog\cmdctrl.cnf
DDS\verilog\cmdctrl.fit
DDS\verilog\cmdctrl.hex
DDS\verilog\cmdctrl.hif
DDS\verilog\cmdctrl.mmf
DDS\verilog\cmdctrl.ndb
DDS\verilog\cmdctrl.pin
DDS\verilog\cmdctrl.pof
DDS\verilog\cmdctrl.rpt
DDS\verilog\cmdctrl.scf
DDS\verilog\cmdctrl.snf
DDS\verilog\cmdctrl.sof
DDS\verilog\cmdctrl.ttf
DDS\verilog\kbscan(1).cnf
DDS\verilog\kbscan(2).cnf
DDS\verilog\kbscan(3).cnf
DDS\verilog\kbscan(4).cnf
DDS\verilog\kbscan.acf
DDS\verilog\kbscan.cnf
DDS\verilog\kbscan.fit
DDS\verilog\kbscan.hex
DDS\verilog\kbscan.hif
DDS\verilog\kbscan.mmf
DDS\verilog\kbscan.ndb
DDS\verilog\kbscan.pin
DDS\verilog\kbscan.pof
DDS\verilog\kbscan.rpt
DDS\verilog\kbscan.snf
DDS\verilog\kbscan.sof
DDS\verilog\kbscan.ttf
DDS\verilog\kbscan.vhd
DDS\verilog\mainctrl(1).cnf
DDS\verilog\mainctrl(10).cnf
DDS\verilog\mainctrl(11).cnf
DDS\verilog\mainctrl(12).cnf
DDS\verilog\mainctrl(13).cnf
DDS\verilog\mainctrl(14).cnf
DDS\verilog\mainctrl(15).cnf
DDS\verilog\mainctrl(16).cnf
DDS\verilog\mainctrl(17).cnf
DDS\verilog\mainctrl(18).cnf
DDS\verilog\mainctrl(19).cnf
DDS\verilog\mainctrl(2).cnf
DDS\verilog\mainctrl(20).cnf
DDS\verilog\mainctrl(21).cnf
DDS\verilog\mainctrl(22).cnf
DDS\verilog\mainctrl(23).cnf
DDS\verilog\mainctrl(24).cnf
DDS\verilog\mainctrl(25).cnf
DDS\verilog\mainctrl(26).cnf
DDS\verilog\mainctrl(27).cnf
DDS\verilog\mainctrl(28).cnf
DDS\verilog\mainctrl(29).cnf
DDS\verilog\mainctrl(3).cnf
DDS\verilog\mainctrl(30).cnf
DDS\verilog\mainctrl(31).cnf
DDS\verilog\mainctrl(32).cnf
DDS\verilog\mainctrl(33).cnf
DDS\verilog\mainctrl(34).cnf
DDS\verilog\mainctrl(4).cnf
DDS\verilog\mainctrl(5).cnf
DDS\verilog\mainctrl(6).cnf
DDS\verilog\mainctrl(7).cnf
DDS\verilog\mainctrl(8).cnf
DDS\verilog\mainctrl(9).cnf
DDS\verilog\mainctrl.acf
DDS\verilog\mainctrl.cnf
DDS\verilog\mainctrl.fit
DDS\verilog\mainctrl.hex
DDS\verilog\mainctrl.hif
DDS\verilog\mainctrl.mmf
DDS\verilog\mainctrl.ndb
DDS\verilog\mainctrl.pin
DDS\verilog\mainctrl.pof
DDS\verilog\mainctrl.rpt
DDS\verilog\mainctrl.scf
DDS\verilog\mainctrl.snf
DDS\verilog\mainctrl.sof
DDS\verilog\mainctrl.sym
DDS\verilog\mainctrl.ttf
DDS\verilog\mainctrl.v
DDS\verilog\modsel.acf
DDS\verilog\modsel.cnf
DDS\verilog\modsel.fit
DDS\verilog\modsel.hex
DDS\verilog\modsel.hif
DDS\verilog\modsel.mmf
DDS\verilog\modsel.ndb
DDS\verilog\modsel.pin
DDS\verilog\modsel.pof
DDS\verilog\modsel.rpt
DDS\verilog\modsel.scf
DDS\verilog\modsel.snf
DDS\verilog\modsel.sof
DDS\verilog\modsel.ttf
DDS\verilog\myctrl.acf
DDS\verilog\myctrl.hif
DDS\verilog\myctrl.mmf
DDS\verilog\myctrl.v
DDS\verilog\mytest(1).cnf
DDS\verilog\mytest(10).cnf
DDS\verilog\mytest(11).cnf
DDS\verilog\mytest(12).cnf
DDS\verilog\mytest(13).cnf
DDS\verilog\mytest(14).cnf
DDS\verilog\mytest(15).cnf
DDS\verilog\mytest(16).cnf
DDS\verilog\mytest(17).cnf
DDS\verilog\mytest(18).cnf
DDS\verilog\mytest(19).cnf
DDS\verilog\mytest(2).cnf
DDS\verilog\mytest(20).cnf
DDS\verilog\mytest(21).cnf
DDS\verilog\mytest(22).cnf
DDS\verilog\mytest(23).cnf
DDS\verilog\mytest(24).cnf
DDS\verilog\mytest(25).cnf
DDS\verilog\mytest(26).cnf
DDS\verilog\mytest(27).cnf
DDS\verilog\mytest(28).cnf
DDS\verilog\mytest(29).cnf
DDS\verilog\mytest(3).cnf
DDS\verilog\mytest(30).cnf
DDS\verilog\mytest(31).cnf
DDS\verilog\mytest(32).cnf
DDS\verilog\mytest(33).cnf
DDS\verilog\mytest(34).cnf
DDS\verilog\mytest(35).cnf
DDS\verilog\mytest(36).cnf
DDS\verilog\mytest(37).cnf
DDS\verilog\mytest(38).cnf
DDS\verilog\mytest(39).cnf
DDS\verilog\mytest(4).cnf
DDS\verilog\mytest(40).cnf
DDS\verilog\mytest(41).cnf
DDS\verilog\mytest(42).cnf
DDS\verilog\mytest(43).cnf
DDS\verilog\mytest(44).cnf
DDS\verilog\mytest(45).cnf
DDS\verilog\mytest(46).cnf
DDS\verilog\mytest(5).cnf
DDS\verilog\mytest(6).cnf
DDS\verilog\mytest(7).cnf
DDS\verilog\mytest(8).cnf
DDS\verilog\mytest(9).cnf
DDS\verilog\mytest.acf
DDS\verilog\mytest.cnf
DDS\verilog\mytest.fit
DDS\verilog\mytest.gdf
DDS\verilog\mytest.hex
DDS\verilog\mytest.hif
DDS\verilog\mytest.mmf
DDS\verilog\mytest.ndb
DDS\verilog\mytest.pin
DDS\verilog\mytest.pof
DDS\verilog\mytest.rpt
DDS\verilog\mytest.scf
DDS\verilog\mytest.snf
DDS\verilog\mytest.sof
DDS\verilog\mytest.sym
DDS\verilog\mytest.tdf
DDS\verilog\mytest.ttf
DDS\verilog\mytest.v
DDS\verilog\phaserom1.cmp
DDS\verilog\phaserom1.inc
DDS\verilog\phaserom1.sym
DDS\verilog\phaserom1.v
DDS\verilog\phaserom1_bb.v
DDS\verilog\phaserom1_inst.v
DDS\verilog\phaserom2.cmp
DDS\verilog\phaserom2.inc
DDS\verilog\phaserom2.sym
DDS\verilog\phaserom2.v
DDS\verilog\phaserom2_bb.v
DDS\verilog\phaserom2_inst.v
DDS\verilog\phaserom3.cmp
DDS\verilog\phaserom3.inc
DDS\verilog\phaserom3.sym
DDS\verilog\phaserom3.v
DDS\verilog\phaserom3_bb.v
DDS\verilog\phaserom3_inst.v
DDS\verilog\pr.acf
DDS\verilog\pr.hif
DDS\verilog\pr.mif
DDS\verilog\pr.mif.bak
DDS\verilog\pr1.acf
DDS\verilog\pr1.hif
DDS\verilog\pr2.acf
DDS\verilog\pr2.hif
DDS\verilog\pr2.mif
DDS\verilog\pr2.mif.bak
DDS\verilog\pr3.acf
DDS\verilog\pr3.hif
DDS\verilog\pr3.mif
DDS\ESD-5综合设计实验箱使用说明.pdf
DDS\c
DDS\verilog
DDS

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