based on Verilog-HDL hardware Circuit of 9.7 Stepper Motor Control 9.7 .1 stepper motor-driven logic symbols 9.7.2 stepper motor driven map the chronology-- Step 9.7.3 Machine-driven logic diagram 9.7.4 Counting Module Design and Implementation 9.7.5 decoding module design and Implementation 9.7.6 stepper motor driven Verilog-HDL Compiler means locale 9.7.7 Description Order- "macro substitution` define "the use 9.7.8 compiler directives-" The time scale `tim escale "use 9.7.9 system tasks-" $ finish "to use 9.7.10 stepper motor drive hardware

Packet : 555933729.7_diriver_control.rar filelist
09-07_fangzhen\COUNT_UP_DOWN.v
09-07_fangzhen\COUNT_UP_DOWN_TEST.v
09-07_fangzhen\DEC2_4.v
09-07_fangzhen\DEC2_4_TEST.v
09-07_fangzhen\DIRIVER.v
09-07_fangzhen\DIRIVER_TEST.v
09-07_fangzhen

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