VHDL-FPGA-Verilog List Page 941

VHDL-FPGA-Verilog list

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Barrel-shifter Downloaded：0: barriel shifter is used to design the unconfined shift. It has optional code to decide the logical function.also, you can decide the bit your shifter.
Date : 2025-08-03 Size : 7kb User :
combination-logic Downloaded：1: Simple logic operations VHDL program containing specific procedural requirements. Right to do the same kind of logic function computing dataflow and behavior of two different forms of programming, suitable for beginners
Date : 2025-08-03 Size : 459kb User : Kimberly
Fpga-based-ADC-sampling-voltage- Downloaded：0: Fpga-based ADC sampling voltage used, displayed on the digital pipe. verilog language.
Date : 2025-08-03 Size : 2.16mb User : 祖儿
24sCountdown Downloaded：0: Based on CPLD 24 seconds countdown Timing window displays and LED digital tube is divided into two parts, where the diode portion represents a digital tube, .0- .9 or .00- .09, so the timer accuracy can be increased to 0
Date : 2025-08-03 Size : 2.21mb User : 我0621
dsp_core_tx_filter Downloaded：0: Application on the USRP N210 FPGA development board above XIlinx variable sampling filter, to achieve 25- 30.72M variable sampling filter, adapt LTE physical layer requirements
Date : 2025-08-03 Size : 3kb User : 何中华
SystemVerilog-Assertions-source-code Downloaded：0: SystemVerilog Assertion Application Guide for each chapter of a book asserts the source code, a very good learning materials SVA
Date : 2025-08-03 Size : 3.07mb User : 杨斌
lut Downloaded：0: Can be parameterized configurable CAM module, modeled xilinx IP core designed, implemented using the basic unit SRL16E, space-saving
Date : 2025-08-03 Size : 9kb User : 杨斌
I2C-master-Architecture.v1.1 Downloaded：0: Architechture for I2C master to design the VHDL code
Date : 2025-08-03 Size : 231kb User : Probil Kumar
Cyclone4_115_TV Downloaded：0: Based on Altera cyclone4_115 chip under full VGA port development projects, including the VHDL source files, and project files, the VGA port for FPGA development of great reference value.
Date : 2025-08-03 Size : 704kb User : bankfly
Cyclone4_SD_Card_Audio_Player Downloaded：0: Cyclone4 FPGA chip based audio player to complete the project works, including the SOPC project code, and SD card reader module IP, as well as complete Q2 next project.
Date : 2025-08-03 Size : 2.26mb User : bankfly
Cyclone4_115_IR Downloaded：0: Project under infrared transceiver FPGA based cyclone4 chips, including project sof verilog source code has been downloaded files for fpga-based infrared module development of great reference value.
Date : 2025-08-03 Size : 83kb User : bankfly
DCT_IP_Testbench Downloaded：0: DCT transform a complete IP, based on Verilog prepared, including both complete testbench, convenient module simulation and testing.
Date : 2025-08-03 Size : 29kb User : bankfly

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