VHDL-FPGA-Verilog List Page 629

VHDL-FPGA-Verilog list

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BCD-CODE Downloaded：0: FPGA binary code to BCD based procedures, very suitable for learning to use primary rookie entry procedures, are welcome to download the learning
Date : 2025-06-25 Size : 43kb User : zhang yang
status-code Downloaded：0: A simple state machine based on FPGA procedures, very suitable for learning to use primary rookie entry procedures, are welcome to download the learning
Date : 2025-06-25 Size : 192kb User : zhang yang
motostep-code Downloaded：0: FPGA stepper motor program based on primary rookie, very suitable for learning to use entry procedures, are welcome to download the learning
Date : 2025-06-25 Size : 216kb User : zhang yang
tset_freq Downloaded：0: FPGA and other precision frequency measurement program source code, complete project
Date : 2025-06-25 Size : 7.82mb User : 江志成
spi_4_2ch Downloaded：0: FPGA spi interface source code, can achieve the two slaves, after expansion can quickly achieve multiple slaves, set flexible, easy to use, there is a comment
Date : 2025-06-25 Size : 2kb User : 江志成
traffic-light-controller-based-FPGA Downloaded：0: It designs a traffic lights signal controllers of crossroads with EDA technology.The controllers control the Vehicle passing of A, B two crossing path.
Date : 2025-06-25 Size : 1kb User : 峰哥
COA_PRO Downloaded：0: implement of Pipelined MIPS processor
Date : 2025-06-25 Size : 805kb User : 周易宸
DA0832_EDA Downloaded：0: DAC0832 some supporting VHDL programming language, only for them to learn!
Date : 2025-06-25 Size : 8.27mb User : 章伟
verilog-up-counter Downloaded：0: Verilog code for 4 bit Sync Up Counter
Date : 2025-06-25 Size : 11kb User : cmags
verilog-lfsr-updown-counter Downloaded：0: Verilog 8 bit LFSR Up-Down Counter
Date : 2025-06-25 Size : 10kb User : cmags
verilog-8-bit-Gray-Counter Downloaded：0: Verilog 8 bit Gray Counter
Date : 2025-06-25 Size : 10kb User : cmags
Verilog-Divide-by-3-Counter Downloaded：0: Verilog Divide by 3 Counter
Date : 2025-06-25 Size : 10kb User : cmags

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