VHDL-FPGA-Verilog List Page 538

VHDL-FPGA-Verilog list

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DA_TLC5615s-Voltage-on-Digital-tube Downloaded：0: use 10 serial DA TLC5615 and display on digital tube
Date : 2025-06-21 Size : 1.89mb User : 作家
DA_TLC5615_breath-led Downloaded：0: breath led
Date : 2025-06-21 Size : 529kb User : 作家
ZZ Downloaded：0: cpsk feichanghaoyong nizijimanmankan
Date : 2025-06-21 Size : 1kb User : 王立志
test Downloaded：0: FPGA-based digital stopwatch (digital scan) program. Platform: quartusII 15.0
Date : 2025-06-21 Size : 3.46mb User : 陈明威
FIFO Downloaded：0: The code for the FIFO code, compile environment Quartus/Xilinx, language VerilogHDL
Date : 2025-06-21 Size : 2kb User : 韩劭纯
03_key_detect_1 Downloaded：0: The program for key stabilization program, the compiler environment Quartus/Xilinx, use language VerilogHDL
Date : 2025-06-21 Size : 5.15mb User : 韩劭纯
07_number_mod Downloaded：0: The program for the digital program, the compiler environment Quartus/Xilinx, use language VerilogHDL
Date : 2025-06-21 Size : 5.66mb User : 韩劭纯
16_buzzer Downloaded：0: The program for the buzzer, compiler environment for Quartus/Xilinx, use language VerilogHDL
Date : 2025-06-21 Size : 5.55mb User : 韩劭纯
25_lcd_system Downloaded：0: The program for lcd, compiler environment for Quartus/Xilinx, use language VerilogHDL
Date : 2025-06-21 Size : 5.74mb User : 韩劭纯
jpeg_latest.tar Downloaded：0: Jpeg Compressor in HDL language
Date : 2025-06-21 Size : 848kb User : hamid
mips16e.tar Downloaded：0: Use verilog HDL prepared mips16e 16 位 cpu, the official note has been prepared in accordance with mips16e
Date : 2025-06-21 Size : 9.71mb User : 刘丹阳
Elevator Downloaded：0: Simple elevator control on Spartan-3E board using verilog write, LCD1602 analog display lift status
Date : 2025-06-21 Size : 377kb User : 公孙璃

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