VHDL-FPGA-Verilog List Page 531

VHDL-FPGA-Verilog list

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ez_usb_write Downloaded：0: FPGA writer to within 68,013
Date : 2025-06-21 Size : 4.66mb User : whd
SourceCode Downloaded：0: 68013 read content within sdram Firmware
Date : 2025-06-21 Size : 3mb User : whd
time Downloaded：0: Verilog language, the method of the dividing timer is displayed on the digital display 0-59 seconds.
Date : 2025-06-21 Size : 543kb User : 刘欣
UART(Verilog) Downloaded：0: Verilog UART
Date : 2025-06-21 Size : 1.7mb User : ouhongshi
sram_test Downloaded：0: SRAM Verilog
Date : 2025-06-21 Size : 1kb User : ouhongshi
S6_LCD_VHDL Downloaded：0: LCD VHDL
Date : 2025-06-21 Size : 496kb User : ouhongshi
LCD-Verilog Downloaded：0: LCD Verilog
Date : 2025-06-21 Size : 2kb User : ouhongshi
div10_test Downloaded：0: DIV10 Verilog
Date : 2025-06-21 Size : 1.74mb User : ouhongshi
LCD1602 Downloaded：0: Verilog language CPLD control LCD custom output procedures, can be simulated, can be converted to circuit schematics.
Date : 2025-06-21 Size : 360kb User : 王志
chuankou Downloaded：0: UART Verilog serial port and computer communications multi byte communication program
Date : 2025-06-21 Size : 272kb User : 王志
LCD12864 Downloaded：0: Simple 12864 program
Date : 2025-06-21 Size : 269kb User : 王志
liushuideng Downloaded：0: Basic flow light control procedures, simple control functions
Date : 2025-06-21 Size : 162kb User : 王志

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