VHDL-FPGA-Verilog List Page 4155

VHDL-FPGA-Verilog list

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vhdl_i2c Downloaded：0: 7. IIC EEPROM Access Interface Development Board experimental pressed a button keyboard CPLD code will go into the data switch E EPROM a certain address, pressed another button, just write the data back to reading CPLD,
Date : 2025-05-19 Size : 410kb User : 赵海东
vhdl_dial Downloaded：0: dial-switch dial-switching experiment 8 0 1 state in seven of the eight corresponding digital control-show or a 0.
Date : 2025-05-19 Size : 158kb User : 赵海东
vhdl_buzzer Downloaded：0: buzzer to buzzer this experiment certain frequency square wave can buzzer sounded a corresponding pitch. The experiment by designing a state machine and the buzzer sounded a divider so that the "multi-microphone to the s
Date : 2025-05-19 Size : 212kb User : 赵海东
1_070116141639 Downloaded：0: verilog ps2 Programming Interface design, the design based fpga
Date : 2025-05-19 Size : 3kb User : ykf
vhdl_led Downloaded：0: seven of the digital control experiments (including two experimental), the digital control of a Test : Dynamic scanning approach to the eight digital control "at the same time" show 0-7,
Date : 2025-05-19 Size : 356kb User : 赵海东
VHDLnf Downloaded：0: VHDL arbitrary integer frequency,-- n as long as you want to set the frequency of the numerical breakdown on the
Date : 2025-05-19 Size : 1kb User : 赵海东
1_061026140305 Downloaded：0: FPGA-based I2C bus simulation, using verilog HDL language.- Based on the FPGA I2C main line simulation, verilog uses the HDL language compilation.
Date : 2025-05-19 Size : 200kb User :
chuanbingzhuanhuan Downloaded：0: VHDL code, through simulation, the variation can be downloaded into a document, but need to change, and change series
Date : 2025-05-19 Size : 3kb User : 赵宾
ps2_lcd_1602 Downloaded：0: communication with the PS2, PS2 keys to the value of LCD Display, VHDL.
Date : 2025-05-19 Size : 566kb User : jerry
dig_clk_lcd Downloaded：0: the realization by the dynamic display LCD, VHDL
Date : 2025-05-19 Size : 1.75mb User : jerry
dianzheng6.2banben Downloaded：0: 8* 8 lattice the realization cycle shows vhdl four letters
Date : 2025-05-19 Size : 261kb User : jerry
qiangdaqi4ren7.1 Downloaded：0: four Responder the realization host keys to remove the keys, according to begin key 100 seconds to answer in the countdown time
Date : 2025-05-19 Size : 785kb User : jerry

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