VHDL-FPGA-Verilog List Page 4105

VHDL-FPGA-Verilog list

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PCI_VHDL Downloaded：0: 32 of the PCI interface 33M realize VHDL, VHDL, or would like to realize in depth study could take a look at the PCI
Date : 2025-05-22 Size : 104kb User : 缪德芳
USB_VHDL Downloaded：0: USB bus interface of the VHDL realize, I hope to help everyone
Date : 2025-05-22 Size : 55kb User : 缪德芳
fir Downloaded：0: Verilog procedures, to achieve 4-order filter fir-filter.
Date : 2025-05-22 Size : 1kb User : 左麟
viterbi Downloaded：0: VHDL procedures vertibe realize the encoding and decoding.
Date : 2025-05-22 Size : 2kb User : 左麟
microcontroller Downloaded：1: VHDL procedures realize a microcontroller, control data of the mathematical calculations.
Date : 2025-05-22 Size : 4kb User : 左麟
encode Downloaded：0: Quartus under the RS (5,3) encoder source code, using Verilog language.
Date : 2025-05-22 Size : 3kb User : 桃子
ExpandDataBit Downloaded：0: Quartus data under the expansion project, you can view the waveform directly operation
Date : 2025-05-22 Size : 129kb User : 桃子
GRAYcode Downloaded：0: Binary code is converted to Gray code, the entire project, including the waveform files in the Quartus on direct simulation.
Date : 2025-05-22 Size : 29kb User : 桃子
jkchu Downloaded：0: jk flip-flop, try to edit their own, using state machine to achieve, you can
Date : 2025-05-22 Size : 80kb User : 谢小川
fenpin Downloaded：0: Divider, try to edit their own, 20 and 40 sub-band can be
Date : 2025-05-22 Size : 91kb User : 谢小川
quanjia Downloaded：0: Full adder, the use of macro functional blocks, together with simulation waveform diagram
Date : 2025-05-22 Size : 90kb User : 谢小川
zhuangtai Downloaded：0: State machine of the typical drinking, can be used to learn to imitate, four state, easy to learn
Date : 2025-05-22 Size : 98kb User : 谢小川

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