VHDL-FPGA-Verilog List Page 4019

VHDL-FPGA-Verilog list

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ps2rs232 Downloaded：0: FPGA to control the use of PS2, is very practical and helpful for beginners
Date : 2025-05-25 Size : 984kb User : 杜菲
fenpin Downloaded：0: The use of Verilog language, the design of crossovers, it is a good reference
Date : 2025-05-25 Size : 283kb User : 杜菲
S7_UART Downloaded：0: FPGA realization of the use of serial communications, a very good learning materials especially in the wake of a friend Verilog
Date : 2025-05-25 Size : 458kb User : 杜菲
T4_sdram_control Downloaded：0: control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster
Date : 2025-05-25 Size : 19kb User : 杜菲
dds Downloaded：0: 1 fpga based on the hurricane and STC dds SCM signal source more of their own can use the maximum frequency is 2M
Date : 2025-05-25 Size : 354kb User : 阿斯顿
fpgafft Downloaded：0: FPGA dsp realize using the fft algorithm which has a number of document files and the use of VHDL to write the 1024 point fft code
Date : 2025-05-25 Size : 521kb User : 阿斯顿
pingpong Downloaded：0: VHDL language with the table tennis games, can realize the CPLD, the specific information, see the internal documents
Date : 2025-05-25 Size : 74kb User : 王力
THREEFLIFT Downloaded：1: - the elevator controller design and analysis of the controller layer into three layers, and the elevator to floor stop request, after a second elevator door open, open the door indicator, open the door after 4 seconds,
Date : 2025-05-25 Size : 223kb User : 梁浪风
uart_VHDL Downloaded：0: UART section of VHDL procedures, can be used as reference
Date : 2025-05-25 Size : 10kb User : wangwei
QuartusII Downloaded：0: Quartus II 6.0 Introduction Guide. Harbin Engineering University College of Information and Communication Engineering
Date : 2025-05-25 Size : 841kb User : zb
convert Downloaded：0: With the COE file that generates ISE's IP kernel, some specific parameters should be set up by yourself!
Date : 2025-05-25 Size : 1kb User : 1111
led Downloaded：0: 8 digital scanning display circuit design (VHDL) through compiler
Date : 2025-05-25 Size : 1kb User : hh

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