VHDL-FPGA-Verilog List Page 3838

VHDL-FPGA-Verilog list

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liftvhdl Downloaded：0: err
Date : 2025-06-16 Size : 9kb User : 林姗
I2C Downloaded：0: Based on the I2C bus master FPGA Design and Implementation
Date : 2025-06-16 Size : 1kb User : wang
THXS3EI-I_student_final Downloaded：0: tinghua FPGA ziliao
Date : 2025-06-16 Size : 443kb User : jasper lee
top Downloaded：0: FPGA procedures top.v documents, the main function of DDS signal generator, through the timer can be simple to achieve the output amplitude wuji hopping
Date : 2025-06-16 Size : 2kb User : 陈剑
spi Downloaded：0: Verilog hardware description language used to achieve the spi bus protocol
Date : 2025-06-16 Size : 1kb User : cuiwenpin
VHDL Downloaded：0: VHDL (Very High Speed Integrated Circuit) Tutorial! VHDL for beginners to use!
Date : 2025-06-16 Size : 15.55mb User : 薛超耀
I2C_test Downloaded：0: FPGA EP2C5Q288C8 I2C original code, test that is used to open OK.
Date : 2025-06-16 Size : 812kb User : kenychen
ir_7led Downloaded：0: FPGA EP2C5Q288C8 IR-LED original code, test that is used to open OK.
Date : 2025-06-16 Size : 643kb User : kenychen
dl2c58_c5 Downloaded：0: FPGA EP2C5Q288C8 TEST original code, test that is used to open OK.
Date : 2025-06-16 Size : 1.05mb User : kenychen
sclock Downloaded：0: FPGA EP2C5Q288C8 the original serial code, test that is used to open OK.
Date : 2025-06-16 Size : 603kb User : kenychen
led_key Downloaded：0: FPGA EP2C5Q288C8 KEY operate the original code, test that is used to open OK.
Date : 2025-06-16 Size : 180kb User : kenychen
ISPLEVER Downloaded：2: ispLEVER is LATTICE of CPLD, FPGA development environment succession, ISPLEVER license file- ISPLEVER6 .0-7.1 the Zhuceji
Date : 2025-06-16 Size : 265kb User : 陈荣

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