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ASK_VHDL
Downloaded:0
ASK modulation VHDL procedures- File Name: PL_ASK- features: VHDL hardware description language based on the base-band signal amplitude modulation ASK
Date
: 2025-06-18
Size
: 41kb
User
:
huangsong
frequence_VHDL
Downloaded:0
The program and simulation of frequency meter with the principle of equiprecision frequency measurement -- file name: PLJ. VHD. Function: 4 display of the precision frequency meter. -Such as the accuracy of frequency mea
Date
: 2025-06-18
Size
: 120kb
User
:
huangsong
ENCODE
Downloaded:0
Interleaved Coded achieve this source, source code for VHDL language. Running on the transmitter FPGA.
Date
: 2025-06-18
Size
: 2kb
User
:
yinglun
cordic
Downloaded:0
The use of CORDIC algorithm calculating arctangent value, very useful, we can down
Date
: 2025-06-18
Size
: 1kb
User
:
江山
AN532_PCIe_sopc_s2gx_x4
Downloaded:0
NIOS based S2gx chips x4 mode under the PCI-Express Module
Date
: 2025-06-18
Size
: 4.63mb
User
:
lzm
flash_controller
Downloaded:0
Altera
Date
: 2025-06-18
Size
: 389kb
User
:
lzm
mcfsqdsp3
Downloaded:0
The realization of a pulse generator can be used for PWM control
Date
: 2025-06-18
Size
: 1kb
User
:
gcm
DigitalClock
Downloaded:0
VHDL digital clock counting procedures showed that 24 hours with a school function (hours, minutes) the realization of an alarm clock function (timing, downtown ring)
Date
: 2025-06-18
Size
: 12kb
User
:
liangchenglai
FPGAkaifashilidaohang
Downloaded:1
err
Date
: 2025-06-18
Size
: 1.49mb
User
:
黑洞
SHUZIMIAOBIAO
Downloaded:0
Stopwatch logical structure is relatively simple, it mainly shows decoder, prescaler, decimal counter, alarm and six counter-band components. Throughout the stopwatch the most critical is how to get an accurate pulse 100
Date
: 2025-06-18
Size
: 6kb
User
:
朱书洪
VHDL
Downloaded:0
This is a small program written in VHDL, suitable for beginners and are learning and use!
Date
: 2025-06-18
Size
: 295kb
User
:
herun
VHDLyushizgp
Downloaded:0
err
Date
: 2025-06-18
Size
: 1.02mb
User
:
alextuo
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4310
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