VHDL-FPGA-Verilog List Page 3727

VHDL-FPGA-Verilog list

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fq_div Downloaded：0: Achieve an arbitrary integer divider of the VHDL source code, has been testing
Date : 2025-06-21 Size : 3kb User : 王双
uartfifo Downloaded：0: Realization of UART in FPGA, with UART module control codes.
Date : 2025-06-21 Size : 552kb User : 杨文斌
modelsim Downloaded：0: modelsim entry, easy to learn, easy to use. Note the rich
Date : 2025-06-21 Size : 494kb User : 里地
FPGA Downloaded：0: FPGA, vhdl language learning materials FPGA design of a simple design dds
Date : 2025-06-21 Size : 2mb User : wade
verilog Downloaded：1: Tsinghua University, studying information vhdl Institute information is worth courseware download
Date : 2025-06-21 Size : 771kb User : wade
traffic_light Downloaded：0: CPLD to control the traffic light process, the procedure is pretty good! U.S. study with ah!
Date : 2025-06-21 Size : 872kb User : 3dmax
SDHAnalysis Downloaded：0: SDH fiber-optic communication data frame analysis and retrieval implementation of VHDL source code, include the frame synchronization, E1 and F1 stream extraction, DCC1 stream extraction, header overhead serial output fo
Date : 2025-06-21 Size : 31kb User : 张晓彬
VHDL Downloaded：0: DEMO2 digital tube display circuit scan/DEMO4 count clock scan design DEMO5 keyboard/DEMO6 Waveform Generator/DEMO7 implementation by DAC voltage signal detection/DEMO8 ADC voltage measurement/DEMO9 LCD driver circuit de
Date : 2025-06-21 Size : 719kb User : wang
FinalFPMultiplier Downloaded：0: Simple 32 bit Floating point Multiplier
Date : 2025-06-21 Size : 7.03mb User : Rahul
513 Downloaded：0: FPGA-based adaptive digital frequency meter, measuring range 1Hz-99.9MHz
Date : 2025-06-21 Size : 4kb User : 王二
vga Downloaded：0: vga
Date : 2025-06-21 Size : 2kb User : 清洪
miffile Downloaded：0: Mif files generated by matlab. (Altera' s EDA software, such as maxplus, quartus used to initialize and so on rom, ram, such as the file format)
Date : 2025-06-21 Size : 1kb User : 何亮

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