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VHDL-FPGA-Verilog list
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computer10
Downloaded:0
VHDL design language based on 8-bit CISC microprocessor examples
Date
: 2025-06-22
Size
: 740kb
User
:
steven
computer11
Downloaded:0
FPGA-based CPU design ........
Date
: 2025-06-22
Size
: 988kb
User
:
steven
computer12
Downloaded:0
FPGA-based RISC CPU design eight ....
Date
: 2025-06-22
Size
: 63kb
User
:
steven
monileselect
Downloaded:0
hello!welcome to my code !thank you !
Date
: 2025-06-22
Size
: 541kb
User
:
fei ge
singt
Downloaded:0
sinwave founcation
Date
: 2025-06-22
Size
: 1kb
User
:
化雨春风
ILX509_7064
Downloaded:1
This document is a CPLD (EPM7064) driver line array CCD (ILX509), including schematics and procedures
Date
: 2025-06-22
Size
: 240kb
User
:
wagjur
beep
Downloaded:0
CPLD driver speakers with music player, the program is written in VERILOG,
Date
: 2025-06-22
Size
: 256kb
User
:
wagjur
shumaguan
Downloaded:0
CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
Date
: 2025-06-22
Size
: 1.39mb
User
:
wagjur
statemachine
Downloaded:0
Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, enter a 90-degree phase difference of two-phase, frequency and direction of the output signal
Date
: 2025-06-22
Size
: 1kb
User
:
pudn
fifo
Downloaded:0
FIFO
Date
: 2025-06-22
Size
: 3kb
User
:
陈一可
multi
Downloaded:0
multi
Date
: 2025-06-22
Size
: 22kb
User
:
陈一可
Datapaths
Downloaded:0
vhdl source code for 8 bit datapath logic
Date
: 2025-06-22
Size
: 576kb
User
:
utkarsh
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