VHDL-FPGA-Verilog List Page 3530

VHDL-FPGA-Verilog list

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FPGA_SDRAM_PCI Downloaded：0: FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartus
Date : 2025-06-30 Size : 2.67mb User : 李国扬
FPGA_PCI_DATA Downloaded：0: FPGA-based PCI data distribution process, from the computer through the PCI9054 functions to send data to the FPGA. The development of language verilog, development environment quartusII
Date : 2025-06-30 Size : 231kb User : 李国扬
topmodule3_comments Downloaded：0: it is a 1/2 k=3 viterbi deocder code written in VHDL.
Date : 2025-06-30 Size : 4kb User : Abhishek
FPGA_SOPC Downloaded：0: fpga experimental basis, SOPC beginners entry experiment
Date : 2025-06-30 Size : 1.94mb User : 郑志远
HDB3_coder Downloaded：0: Achieved the 64K low-speed NRZ code 2.048M into high-speed multiplexing and demultiplexing HDB3 code then the process also removed using false synchronous state machine synchronization and false out-of-step state
Date : 2025-06-30 Size : 3mb User : 陈涛
serial_detector Downloaded：0: Were treated with behavioral and gate-level VHDL programming sequence detection methods, procedures clear and straightforward, is a good material for beginners
Date : 2025-06-30 Size : 373kb User : 陈涛
CRC32_DATA16 Downloaded：0: IEEE 802.b CRC32 VHDL
Date : 2025-06-30 Size : 1kb User : balance yeh
61549837an_jian_qu_dou_dong Downloaded：0: VHDL prepared Buffeting button to process!
Date : 2025-06-30 Size : 165kb User : yangcheng
sanxiangxinhaoyuan Downloaded：0: Vhdl-based three-phase signal source can be arbitrary frequency and phase of home, as well as frequency modulation output mode, you can output FM wave
Date : 2025-06-30 Size : 1.03mb User : rd
DDRctroll Downloaded：0: ddr controller fpga to achieve the correct simulation
Date : 2025-06-30 Size : 3.79mb User : gongranli
collect Downloaded：0: max197, verilog
Date : 2025-06-30 Size : 1kb User : liu peng
9999jishu Downloaded：0: VHDL language programming, a total of 7 negative digital display (four digits) which is used in the process of language, the use of MAX+ puls programming.
Date : 2025-06-30 Size : 1kb User : liliang

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