VHDL-FPGA-Verilog List Page 3521

VHDL-FPGA-Verilog list

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CIC_DEC Downloaded：0: CIC decimation filter design, CIC filter order of 8 times 5 samples.
Date : 2025-06-30 Size : 1kb User : 42200306
CIC_DEC_3 Downloaded：0: CIC decimation filter design, CIC filter order 3 times 5 samples.
Date : 2025-06-30 Size : 1kb User : 42200306
CIC_DEC_4 Downloaded：0: CIC extraction filter design, CIC filter adopts 5 - order 4 times extraction. -CIC decimation filter design, CIC filter order 4 times using 5 samples.
Date : 2025-06-30 Size : 1kb User : 42200306
CIC_DEC_6 Downloaded：0: CIC decimation filter design, CIC filter stage 6 times 5 samples.
Date : 2025-06-30 Size : 1kb User : 42200306
debussy_tutorial Downloaded：0: Engaged in a certain friend fpga design simulation for debugging the code the first large, debussy better now for us to save a lot of time, the annex is to introduce the use of debussy Guide, I hope all of you help
Date : 2025-06-30 Size : 409kb User : 钟毓秀
quartus2-1 Downloaded：0: Based on a QuartusII Programming FPDA/QuartusII the computer components can be achieved Arithmetic (add, subtract, from plus 1, since the minus 1, multiplication, division) and logical operators (and, or, non-) and other
Date : 2025-06-30 Size : 1.94mb User : 南才北往
mymux Downloaded：0: Based on FPGA/QuartusII of multiplication, and with a graphics file, you can run the simulation compiler is a good curriculum design your reference!
Date : 2025-06-30 Size : 138kb User : 南才北往
1 Downloaded：0: String and filter (FPGA source code), based on the achievement of development and design of QuartusII and filter string.
Date : 2025-06-30 Size : 7kb User : 南才北往
1 Downloaded：0: Matlab and QuartusII based on the development of wireless communications FPGA design, there are (matlab code, Verilog code abbreviations. Doc) Notes detail dozens of code, there is always the one you like!
Date : 2025-06-30 Size : 3.07mb User : 南才北往
2 Downloaded：0: EDA design and development of valuable information and courseware, content in great detail, the design is that you graduated from a good helper.
Date : 2025-06-30 Size : 6.95mb User : 南才北往
1 Downloaded：0: FPGA-based realization of FIR digital filter FPGA-based realization of FIR digital filter
Date : 2025-06-30 Size : 3.52mb User : 南才北往
2 Downloaded：0: FPGA-based distributed algorithm of the FIR filter design distributed algorithm based on FPGA Design of FIR Filters
Date : 2025-06-30 Size : 2.58mb User : 南才北往

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