VHDL-FPGA-Verilog List Page 3505

VHDL-FPGA-Verilog list

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adsx Downloaded：0: phase-locked pll of fpga design, altera devices EP1s25 selection, design
Date : 2025-07-01 Size : 2kb User : dengxining
fast_pll Downloaded：0: phase-locked pll of fpga design, altera devices EP1s25 selection, design
Date : 2025-07-01 Size : 3kb User : dengxining
pfl_d Downloaded：0: phase-locked pll of fpga design, altera devices EP1s25 selection, design
Date : 2025-07-01 Size : 3kb User : dengxining
ad_pll Downloaded：0: phase-locked pll of fpga design, altera devices EP1s25 selection, design
Date : 2025-07-01 Size : 3kb User : dengxining
elecfans.com-FPGA_SOPC Downloaded：0: Example FPGA_SOPC
Date : 2025-07-01 Size : 1.44mb User : 王男
SRAM_controller Downloaded：0: asynchronus SRAM controller
Date : 2025-07-01 Size : 7kb User : Vijay Baraiya
VerilogHDL Downloaded：0: Huawei House document of the VHDL language, relatively simple and clear, suitable for beginners to learn.
Date : 2025-07-01 Size : 257kb User : fulean
shuzizhong Downloaded：0: 1. Time functions the way the 24-hour, show hours, minutes, seconds. 2. The use of double bond at the Law School, MODE and SET, always choose the former model (including the hours, minutes and seconds when the school), t
Date : 2025-07-01 Size : 318kb User : 杨志厚
LCD_vhdl Downloaded：0: lcd vhdl driver
Date : 2025-07-01 Size : 5kb User : jz
LED_vhdl Downloaded：0: led vhdl driver
Date : 2025-07-01 Size : 6kb User : jz
URAT_vhdl Downloaded：0: uart vhdl sample code
Date : 2025-07-01 Size : 33kb User : jz
waveform_vhdl Downloaded：0: Waveform vhdl Generator
Date : 2025-07-01 Size : 11kb User : jz

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