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VHDL-FPGA-Verilog list
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S1_38yima
Downloaded:0
3-8Decoder
Date
: 2025-07-22
Size
: 121kb
User
:
王景波
S9_LED_RUN
Downloaded:0
S9_LED_RUN
Date
: 2025-07-22
Size
: 162kb
User
:
王景波
multi8
Downloaded:0
multi8
Date
: 2025-07-22
Size
: 1kb
User
:
fanpei
adder32
Downloaded:0
adder32
Date
: 2025-07-22
Size
: 472kb
User
:
fanpei
myjiafa
Downloaded:0
adder-function
Date
: 2025-07-22
Size
: 250kb
User
:
fanpei
adder2-bingxing
Downloaded:0
2adder
Date
: 2025-07-22
Size
: 170kb
User
:
fanpei
adder16
Downloaded:0
adder16
Date
: 2025-07-22
Size
: 298kb
User
:
fanpei
interface
Downloaded:0
Using Cyclone EP1C3, VHDL program algorithm of the signal waveform of real-time sampling and playback at the same time capable of measuring the frequency of the signal in time domain, through a MCU 8-bit parallel interfa
Date
: 2025-07-22
Size
: 4.53mb
User
:
姚益武
codedecoder
Downloaded:0
code-decoder
Date
: 2025-07-22
Size
: 1kb
User
:
科林
OpCtrl
Downloaded:0
Stepper motor rotation control program can be used for variable speed, and mixed use encoder
Date
: 2025-07-22
Size
: 1kb
User
:
强强
ldpc_decoder_802_3an_latest.tar
Downloaded:0
802.3an ldpc decoder verilog 源码
Date
: 2025-07-22
Size
: 864kb
User
:
杨振飞
gcd
Downloaded:0
this is a verilog source code which can count the greatest common divider .
Date
: 2025-07-22
Size
: 305kb
User
:
杨振飞
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