VHDL-FPGA-Verilog List Page 3185

VHDL-FPGA-Verilog list

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Nios_II_Software_User_guide_chinese Downloaded：0: The Chinese version of Nios II design of learning materials, suitable for beginners to learn
Date : 2025-07-28 Size : 974kb User : 张永杰
Verilog_Coding_Style_Proposal Downloaded：0: Altera Verilog HDL code style for the proposed specification
Date : 2025-07-28 Size : 1.76mb User : 张永杰
costas_loop Downloaded：0: concentrative inserted frame sync
Date : 2025-07-28 Size : 5kb User : 白健
VHDL Downloaded：0: Hardware description language books, about the VHDL-based and programming skills, want to be useful to everyone!
Date : 2025-07-28 Size : 33.79mb User : 小孙
modelsim6_0_user_guide Downloaded：0: Modelsim 6.0 Chinese version of the use of tutorials, from installation to use, including picture introduction, suitable for beginners to learn
Date : 2025-07-28 Size : 379kb User : 张永杰
Nios_II_User_guide_CHN Downloaded：0: Nois II software development guide, the Chinese version, from the initial introduction to the use of methods, explaining how to conduct programs on the development of SOPC, suitable for beginners to learn.
Date : 2025-07-28 Size : 974kb User : 张永杰
Playing_FPGA_ Downloaded：0: Playing FPGA, 2008 Altera Asia Innovation Design Contest article, from a novel point of view, introduction and describes the principle of FPGA design methods and techniques, etc. After reading the FPGA，people would have
Date : 2025-07-28 Size : 2.31mb User : 张永杰
EDA_Design_Repor_for_FIR_Filter Downloaded：1: Quartus II-based 17-order FIR filter design report, detailed from the realization of FIR filter theory to design the whole process, suitable for learning.
Date : 2025-07-28 Size : 185kb User : 张永杰
jianpanjiekoups2 Downloaded：0: 【Original】 44 matrix keyboard interface program (VHDL) (2009-10-27 201747) Tags: Matrix keyboard vhdl Zatan junior version: support the importation of three 10-digit addition and subtraction with two operands or compare
Date : 2025-07-28 Size : 3kb User : hooyu
VHDLkejian Downloaded：0: EDA technology from a sense: to learn a software approach to efficiently complete the hardware design of computer technology __------ VHDL text description of the function of the system- the system logical description (a
Date : 2025-07-28 Size : 1.59mb User : hooyu
divider Downloaded：0: Efficient VERIFLOG description language of the divider, than the average high speed
Date : 2025-07-28 Size : 139kb User : henry
hdb3_decode Downloaded：0: hdb3 code encoding and decoding code, including modules.
Date : 2025-07-28 Size : 636kb User : Gina

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