VHDL-FPGA-Verilog List Page 3184

VHDL-FPGA-Verilog list

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weitongbu Downloaded：0: failed to translate
Date : 2025-07-28 Size : 189kb User : Gina
M Downloaded：0: Small M sequence generator. Sequence length is 7. Facilitate the change.
Date : 2025-07-28 Size : 101kb User : Gina
eth Downloaded：1: Ahb a Gigabit Ethernet interface MAC, including the configuration interface apb
Date : 2025-07-28 Size : 31kb User : daisy
traffic_light Downloaded：0: EDA courses compiled job- traffic lights, the specific requirement is that the crossroads on the road in both directions each with a group of red, green and yellow lights, indicating the order: One way is to green, yello
Date : 2025-07-28 Size : 275kb User : buyi
BPSK_track_10.23M_BD_IF46.52MHz Downloaded：0: communications between DSP and FPGA Besides produce ahead code present code late code and correlation integral result
Date : 2025-07-28 Size : 3.17mb User : laonong
VGA_Ctrl_VHDL Downloaded：0: The use of VHDL in the Quartus II environment to realize VGA interface display control, display monochrome screen, color bars, checkerboard grid and so on.
Date : 2025-07-28 Size : 601kb User : nostalgia
dds_final Downloaded：1: Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Date : 2025-07-28 Size : 1.56mb User : nostalgia
OCIDEC_Drivers Downloaded：0: OCIDEC ATA driver source code
Date : 2025-07-28 Size : 11kb User : 張又又
VHDL Downloaded：0: VHDL
Date : 2025-07-28 Size : 28kb User : eason
f_h_v Downloaded：0: this file describe how to recupere the signals from a video signal when it out from an ADV7180 chip.
Date : 2025-07-28 Size : 1kb User : charido
ADV7180.vhd Downloaded：0: this files describe how to configure an ADV7180
Date : 2025-07-28 Size : 1kb User : charido
ADV7180 Downloaded：0: this files describe how to configure an ADV7180a
Date : 2025-07-28 Size : 1kb User : charido

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