VHDL-FPGA-Verilog List Page 3137

VHDL-FPGA-Verilog list

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DF2C8_02_Key_SW_LED Downloaded：0: 1: Press the reset button, four LED off 2: If the DIP switch to OFF state of all the (input 1111), four LED lights from left to right (Marquee effect), again and again 3: If the DIP switch incomplete for the OFF state (e
Date : 2025-08-02 Size : 336kb User : qiutian
DF2C8_03_NixeTube Downloaded：0: : 8 digital tube starts counting from 0, for each increase of 1 each displayed character from " 0 ~ F" 16 hexadecimal numbers press the reset button, the count start from 0. Thus verifiable digital control, activ
Date : 2025-08-02 Size : 715kb User : qiutian
MultiCycle_CPU Downloaded：0: MultiCycle_CPU
Date : 2025-08-02 Size : 52.04mb User : 刘君
myspu Downloaded：0: vhdl cpu written procedures for the preparation of a state machine directly, without microcode process, the basic algorithms are included, beginners learn to use
Date : 2025-08-02 Size : 1.81mb User : 林云龙
DF2C8_04_BEEP Downloaded：0: verilog achieve buzzer automatically play a piece of music, and digital display notes the current performance of the musical notation symbols.
Date : 2025-08-02 Size : 323kb User : qiutian
DF2C8_05_VGA Downloaded：0: Fpga using Verilog language to achieve VGA reality, in some characters on the display.
Date : 2025-08-02 Size : 840kb User : qiutian
VHDmimasuo Downloaded：0: Prepared using VHDL has the following features of electronic code lock: eight binary input to enter the correct electronic code lock, unlock lights, wrong, unlock warning lights at the same time an alarm sounds, press th
Date : 2025-08-02 Size : 2kb User : liuyunyu
veriloghdl Downloaded：0: Verilog HDL is a hardware description language, used from the algorithm level, gate-level to switch level design of a variety of abstraction levels of digital system modeling. Modeling of digital systems is the complexit
Date : 2025-08-02 Size : 3.97mb User : 盛杰
EDA_12 Downloaded：0: usb blaster by zliang
Date : 2025-08-02 Size : 2.22mb User : 喜子
uart1 Downloaded：0: UART RS232 verilog HDL FPGA xilinx
Date : 2025-08-02 Size : 232kb User : 徐
TSE_MAC_standalone_rar Downloaded：0: MAC layer interface standard using verylog HDL language
Date : 2025-08-02 Size : 1.17mb User : zhouli
XAUI-Hspice[1] Downloaded：0: 10G Attachment Unit Interface realized by hspice
Date : 2025-08-02 Size : 1.15mb User : zhouli

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