VHDL-FPGA-Verilog List Page 3088

VHDL-FPGA-Verilog list

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cordic Downloaded：0: The program uses the Verilog language, can generate sine and cosine signals dds
Date : 2025-11-16 Size : 6kb User : 王丽
cordic1 Downloaded：0: The program uses the VHDL programming language, use cordic algorithm to calculate cos, sin function value
Date : 2025-11-16 Size : 4kb User : 王丽
shift8 Downloaded：0: Using VHDL language QUARTUS development environment, and the string conversion function is the shift register
Date : 2025-11-16 Size : 234kb User : 李欣
CORDIC Downloaded：0: Using VHDL language, using iterative shift algorithm to achieve told additive function cordic
Date : 2025-11-16 Size : 455kb User : rain
luoji1lu Downloaded：0: Simple logic analyzer logic analyzer to trigger single-stage trigger time affected only three words in a trigger only when the output waveform output seems a little small problem Octal waveform is not very clear
Date : 2025-11-16 Size : 855kb User : 宋杰
dayin Downloaded：0: The program using vhdl language, using look-up table method to achieve am modulation, this method is simple and effective
Date : 2025-11-16 Size : 65kb User : rain
CIC Downloaded：0: CIC IP core to achieve the structure of the interface code automatically generated, based on software radio applications, has been used in the thesis.
Date : 2025-11-16 Size : 7kb User : 黄顺涛
pinlvji Downloaded：0: Design of frequency control signal generator, to prevent possible glitches. This is the teacher to the experimental procedures, share what!
Date : 2025-11-16 Size : 5kb User : 黄顺涛
DE2_LCD Downloaded：0: We are DE2 LCD something
Date : 2025-11-16 Size : 5kb User : GYX
cepin Downloaded：0: Frequency meter, in quartus environment running programs, and to measure the signal frequency, signal frequency is larger, the more accurate measurement
Date : 2025-11-16 Size : 300kb User : 李欣
boxingfashengqi Downloaded：0: DDS waveform generator to produce square wave and sine wave of dual-channel waveform generator, runs under the environment in quartus
Date : 2025-11-16 Size : 185kb User : 李欣
RS232Organ1 Downloaded：0: FPGA-based keyboard design, VHDL language and VB developers
Date : 2025-11-16 Size : 1.53mb User : skysonya

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