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VHDL-FPGA-Verilog list
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The project implements a 64-point DIF FFT, verilog compiled by R2MDC structure, through the Modelsim functional simulation, compression bag with rtl code, dc script, the output report.
Date : 2025-11-17 Size : 657kb User : ShuChen

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nothing
Date : 2025-11-17 Size : 46kb User : danny

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This is written based on quartusII software program can be elevator control.
Date : 2025-11-17 Size : 2kb User : xiaowei

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vhkl control dynamic display and speaker sound. Cycle of light and drive led lights
Date : 2025-11-17 Size : 139kb User : shining

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the realizition of rs232 interface by niosii uart ip core of Altera.it seems a most conveniet way.
Date : 2025-11-17 Size : 669kb User : summerooooo

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Based on Verilog' s RS-232C (UART) interface, Design and Implementation
Date : 2025-11-17 Size : 762kb User : 小翁

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This is an image sensor data collection procedures, with the Verilog language, has been tested and approved to change the image data acquisition procedure can be used as reference, to shorten development time.
Date : 2025-11-17 Size : 17kb User : 张俊

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It is the development of the external SRAM with verilog test procedures, preparation of SRAM read and write, read and write the same value when the light LED. In the actual test in detection is correct. SRAM' s friend
Date : 2025-11-17 Size : 551kb User : 张俊

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More suitable for beginners! There are notes because the program is simple, the desire to help everyone a favor! Lots of download ah
Date : 2025-11-17 Size : 1.38mb User : 任杰

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This is about the several ALTERA FPGA' s circuit, looking for a long time to find, a valuable reference for the novice
Date : 2025-11-17 Size : 651kb User : teamcen

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Digital System Design Mentor technical report, do a lattice realization of pinball games, their is also a reference to do this when the data have great reference value
Date : 2025-11-17 Size : 270kb User : 林云龙

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VHDL entry based on entry staff understand the VHDL language is particularly suitable
Date : 2025-11-17 Size : 220kb User : 小小
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