VHDL-FPGA-Verilog List Page 301

VHDL-FPGA-Verilog list

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Detection0X47 Downloaded：0: verilog DVB- scrambling design
Date : 2025-06-05 Size : 5.4mb User : Fancy
rgb1 Downloaded：0: Traffic light traffic light design, implementation, control traffic lights traffic light changes by a predetermined time
Date : 2025-06-05 Size : 1kb User : 高雅
FFT Downloaded：0: Using VHDL language implementation for the realization of fast Fourier transform algorithm, and its correctness is validated by computer simulation.
Date : 2025-06-05 Size : 15.08mb User : d232
UART_Send_handle Downloaded：0: This a good serial communication based on Verilog 422 module, has been repeatedly verified, absolutely reliable, can be used directly, I have repeatedly used in the project, no error
Date : 2025-06-05 Size : 1kb User : yupeng
RRController Downloaded：0: Source Code for a Rom/And Ram controller and some sample Op-Codes.Written in components and assembled together.enjoy!
Date : 2025-06-05 Size : 3kb User : MarshalAmin
UART_TX Downloaded：0: verilog write serial transmission program, sending a single byte and multi-byte transmit function, with testbench, can verify their own
Date : 2025-06-05 Size : 3kb User : 王红伟
UART_RX Downloaded：0: Own use Verilog write serial reception procedures, testbench, can achieve single-byte receive and continuous reception, testbench measurable function
Date : 2025-06-05 Size : 3kb User : 王红伟
verilog-ManchesterCoding Downloaded：0: The implementation of Manchester Coding and differential Manchester Coding. The file has the source code and the picture of the result. The code is explanatory.
Date : 2025-06-05 Size : 93kb User : 都市里的野孩子
answer4 Downloaded：0: Digital Race Responder Design a can hold four groups of participants at the same time answering the digital answering machine 1. To determine the first answer in person and the police command to answer in success, other
Date : 2025-06-05 Size : 5.25mb User : 韩大马
clock Downloaded：0: Digital Clock Design Design a digital clock Requirements: (1) with the digital display hours/minutes/seconds (2) has the time preset function (3) can be used bu
Date : 2025-06-05 Size : 3.31mb User : 韩大马
DDS Downloaded：0: Signal generator design The signal generator is controlled by waveform selection switch output waveform, respectively, can output sine wave, square wave and triangular wave three waveforms, the waveform period is 2 secon
Date : 2025-06-05 Size : 7.67mb User : 韩大马
DS1302 Downloaded：0: Design of Electronic Clock Based on Onboard DS1302 AX301 development board is equipped with a real-time clock (RTC) chip, model DS1302. Learn and master the basic principles of DS1302, and complete the design of electron
Date : 2025-06-05 Size : 6.51mb User : 韩大马

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