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VHDL-FPGA-Verilog list
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QUARTUS software used to implement a 32-order FIR digital filter
Date : 2025-11-21 Size : 2.21mb User : li

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To DE2 as a platform, software with a digital QUARTUS notch filter
Date : 2025-11-21 Size : 1.04mb User : li

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QUARTUS software used with the DA algorithm to achieve a 32-order FIR filter
Date : 2025-11-21 Size : 4.19mb User : li

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QUARTUS software with a 16-order IIR filter
Date : 2025-11-21 Size : 3.06mb User : li

Measured phase difference and with LCD display. Two-way access from the source signal, converted by AD1 and AD2, into the FPGA. In the FPGA, double-value method using the plastic to get two standard square wave, and then
Date : 2025-11-21 Size : 4kb User : 涛哥

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The way of using generic in VHDL design is shown in the Ninput NOR gate.
Date : 2025-11-21 Size : 40kb User : QianLi

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智能小车C8051的程序设置,有用的来看看,智能小车C8051的程序设置,有用的来看看,智能小车C8051的程序设置,有用的来看看
Date : 2025-11-21 Size : 124kb User : luozian

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On-line debugging tools LEON3 nuclear development based on-line debugging tools LEON3 development of nuclear
Date : 2025-11-21 Size : 371kb User : 荣超群

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Speed based on LEON3 processor and the complexity of co-processor SoC design and implementation
Date : 2025-11-21 Size : 265kb User : 荣超群

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CUDA with you deep into the interior, as we interpret why: Only the CPU is the ultimate NVIDIA CUDA
Date : 2025-11-21 Size : 955kb User : LR

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m sequence generation file, written with my own simulation results generated in the modelsim6.0f correct.
Date : 2025-11-21 Size : 17kb User : 刘洪朋

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This is a VHDL module that implements linear prediction filter based on NLMS (normalized least mean square). The module takes complex signal as input and output comlex signal (real and imaginary). Tap size is 4, bit prec
Date : 2025-11-21 Size : 2kb User : 徐滨
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