VHDL-FPGA-Verilog List Page 2753

VHDL-FPGA-Verilog list

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32mips-cpu Downloaded：0: 32 for the MIPS instruction based on the design of the cpu
Date : 2025-11-21 Size : 398kb User : 罗宾
DDR_SDRAM Downloaded：0: ddr sdram control program, lattice, and relatively easy to use, and we look
Date : 2025-11-21 Size : 8.09mb User : 熊熊
VHDL Downloaded：0: NRZ-> HDB3 coding based on VHDL
Date : 2025-11-21 Size : 1kb User : 高达
dcfifo_design_example Downloaded：0: ALTERA' s internal FIFO read and write examples of great reference value, there will be some help for beginners
Date : 2025-11-21 Size : 33kb User : 吕飞
LIP1732CORE_system_mbus_arbiter Downloaded：0: System Verilog M bus arbiter module
Date : 2025-11-21 Size : 26kb User : jc
LIP1742CORE_sdio_rx_fsm Downloaded：0: Verilog SDIO RX FSM module
Date : 2025-11-21 Size : 254kb User : jc
LIP1743CORE_sdio_tx_fsm Downloaded：1: Verilog SDIO TX FSM module
Date : 2025-11-21 Size : 50kb User : jc
VGA_Verilog Downloaded：0: File contains EP2C8Q208C8 Series VGA port FPGA-language program, you can use directly on the hardware board to be tested
Date : 2025-11-21 Size : 372kb User : roger
LCD Downloaded：0: DE2 LCD display driver board and the corresponding test procedures, verilog language to write.
Date : 2025-11-21 Size : 2kb User : 陶陶
ADV7123_a Downloaded：0: VCG display the steps receiving the DE2 board, and one of the work.
Date : 2025-11-21 Size : 302kb User : 陶陶
digitaldownconversionbygpga Downloaded：0: Extraction of the high-powered digital down-conversion design, the focus of a cascaded integrator comb filter based on cascaded half-band filter and the multi-level sampling frequency algorithm.
Date : 2025-11-21 Size : 214kb User : w
work Downloaded：0: Incremental orthogonal optical disk FPGA verilog decoder
Date : 2025-11-21 Size : 29kb User : wangjinghui

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