VHDL-FPGA-Verilog List Page 2480

VHDL-FPGA-Verilog list

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audio1 Downloaded：0: Audio clock, allows to sysnc with other incoming audio data
Date : 2025-11-22 Size : 47kb User : cza
FPGA_study Downloaded：0: the PDF version of FPGA, with author s own experience in the form of notes, to learn about the FPGA is very suitable for beginners to use.
Date : 2025-11-22 Size : 48.34mb User : 张昕
project6_source Downloaded：0: VHDL D_Flip-Flops D Flip-Flop P/C layout and results of verification.
Date : 2025-11-22 Size : 3kb User : bo
clock Downloaded：0: Under the FPGA design using VHDL, digital clock program
Date : 2025-11-22 Size : 422kb User : 钟辉泉
I2C Downloaded：0: i2c VHDL design files and Verlog
Date : 2025-11-22 Size : 28kb User : vsky
140- Downloaded：0: 140 MCU and CPLD interface design, the pro you exhibitions! Thank you!
Date : 2025-11-22 Size : 141kb User : 梁飞
2010112011738964_0 Downloaded：0: MCU and CPLD development related to the development, please take a look, there are problems please contact me! Thank you!
Date : 2025-11-22 Size : 2.15mb User : 梁飞
PIC877LCD320X240 Downloaded：0: pic16f877 lcd320x240
Date : 2025-11-22 Size : 27kb User : lhd
traffic-light Downloaded：0: The code is written using verilog HDL, to achieve the control of traffic lights crossroads
Date : 2025-11-22 Size : 245kb User : 西蟀
digital-clock- Downloaded：0: The code using verilog HDL language. Implementation is a digital stopwatch timer functions
Date : 2025-11-22 Size : 158kb User : 西蟀
txc_ad9957ctrl Downloaded：1: ad9957 chip configuration procedures, including a special trip to the parallel 18-bit data transfer spi port. Created based on quartusII
Date : 2025-11-22 Size : 1kb User : 唐先成
summeri_verilog Downloaded：1: Summary of learning verilog, verilog, including some of their own learning experience
Date : 2025-11-22 Size : 7kb User : 唐先成

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