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VHDL-FPGA-Verilog list
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ecc
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For implementing the Hamming coding in verilog or VHDL
Date : 2025-11-23 Size : 129kb User : test
DRAMsimManual
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DRAM simulator implemented in verilog/VHDL
Date : 2025-11-23 Size : 442kb User : test
lock-and-lcd
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Base YuBo gen experiment box UP- FPGA2C35- Ⅱ and director- Verilog HDL hardware description language, divided into key input module, the LED indicator light module and LCD display module, the BTN1, BTN2 buttons as input
Date : 2025-11-23 Size : 3kb User : 吴寿武
redwire
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Based on the FPGAEASY060 infrared sending, receiving and digital tube display
Date : 2025-11-23 Size : 1kb User : 吴寿武
Find_The_Prime
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Prime Number comparator
Date : 2025-11-23 Size : 2kb User : hzhou
VGA_PS2
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Use the keyboard to control the movement of the display rectangle. Prepared using verilog HDL. Has been achieved spartan3-E on the development board. To ensure ease of use.
Date : 2025-11-23 Size : 1.7mb User : zhangwei
Verilog
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verilog Getting Started tutorial. Very suitable for beginners to read. word document, there are many programming experience, it is worth learning from. A good thing.
Date : 2025-11-23 Size : 1.86mb User : zhangwei
CRC
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The CRC VHDL-based codec design, very easy to use, ha. The contents of my graduation
Date : 2025-11-23 Size : 96kb User : kaicer
FPGA_UWB
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UWB FPGA-based launch systems. Caj UWB FPGA-based launch systems. Caj
Date : 2025-11-23 Size : 4.87mb User : w
sclock_01
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verilog stopwatch
Date : 2025-11-23 Size : 1kb User : sonia
0471441481
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design through verilog HDL
Date : 2025-11-23 Size : 1.78mb User : vishnu
CummingsSNUG2000SJ_NBA_rev1_2
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Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill!
Date : 2025-11-23 Size : 52kb User : vishnu
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