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VHDL-FPGA-Verilog list
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Day4
Downloaded:0
Documentation on the FPGA, through this document can better learn the operation and development of FPGA.
Date
: 2025-11-23
Size
: 3.16mb
User
:
周八两
lcd12864_avalon_interface
Downloaded:0
12864 LCD ip nuclear, niosII, avalon bus.
Date
: 2025-11-23
Size
: 1kb
User
:
吴敬飞
SRAM_16Bit_512K_0
Downloaded:0
SRAM' s ip nuclear, niosii, avalon bus
Date
: 2025-11-23
Size
: 1kb
User
:
吴敬飞
vga_dis
Downloaded:0
VGA display test, this is in the EPM240 development board validated code.
Date
: 2025-11-23
Size
: 1kb
User
:
吴敬飞
sw_debounce
Downloaded:0
This is the key debounce test, with good portability. In the development board verified EPM240
Date
: 2025-11-23
Size
: 1kb
User
:
吴敬飞
ps2_key
Downloaded:0
This is a PS2 keyboard decoder test, the development board verified EPM240
Date
: 2025-11-23
Size
: 1kb
User
:
吴敬飞
remoteupdatecontroller
Downloaded:1
ALTERA CYLONEIII Remote update controller example of an implementation, including read and write EPCS chip through the serial port, for remote programming
Date
: 2025-11-23
Size
: 890kb
User
:
zhuying
ADC
Downloaded:0
TinyM0 core routines--- A/D conversion, user programmable debugger, the default DebugInFlash debug mode If you choose to use ReleaseInFlash mode, downloaded program will use CRP2 after the chip-level encryption, the next
Date
: 2025-11-23
Size
: 305kb
User
:
liu
DCT
Downloaded:0
Discrete Cosine transform VHDL code, with a positive transformation within the inverse transform of the test file.
Date
: 2025-11-23
Size
: 32kb
User
:
hoon
add32
Downloaded:0
32-bit adder, based on the vhdl language, mainly used for testing algorithms
Date
: 2025-11-23
Size
: 2.11mb
User
:
zhang
maoci
Downloaded:0
Vhdl-based source, used to eliminate glitches to achieve the purpose of stabilization
Date
: 2025-11-23
Size
: 49kb
User
:
zhang
up_test
Downloaded:0
Vhdl source code based on the language used to detect the rising edge, used for synchronous clock
Date
: 2025-11-23
Size
: 49kb
User
:
zhang
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.29
.30
.31
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2434
.35
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.38
.39
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4310
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