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VHDL-FPGA-Verilog list
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LCD
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EP2C8Q208_Quartus_V8.0 FPGA-based implementation LCD VHDL code
Date : 2025-11-23 Size : 463kb User : zkzkzk
LED8
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EP2C8Q208_Quartus_V8.0 achieve LED8 VHDL code based on FPGA
Date : 2025-11-23 Size : 381kb User : zkzkzk
RS232
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EP2C8Q208_Quartus_V8.0 FPGA-based implementation RS232 VHDL code
Date : 2025-11-23 Size : 393kb User : zkzkzk
DSA_HT12E
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ht12e verilog code working fine.
Date : 2025-11-23 Size : 567kb User : mohit singhal
FPGALED1616
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Lattice FPGA using VHDL, 1616 driver compile draw the corresponding graphics, text,
Date : 2025-11-23 Size : 632kb User : 曹公
HDL
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Vrilog HDL language design process on paper vending machine, more streamlined, functional to achieve good results
Date : 2025-11-23 Size : 335kb User : 张黎
verilog-Streamline-tutorial
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Has the following description of Verilog HDL language ability: the behavior of the design, the design characteristics of the data flow, composition and structure of the design included monitoring and design verification
Date : 2025-11-23 Size : 2.94mb User : zuo
An-Accurate-branch-prediction
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An Accurate branch prediction microprocessor model
Date : 2025-11-23 Size : 158kb User : 刘全
MIPS32
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of CPU Simulator Compatible with MIPS32 Instruction Set A design scheme of a CPu simulator which is compatjble with MIPS32 instruction set is presented．
Date : 2025-11-23 Size : 287kb User : 刘全
DE2_70_TOP
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use for developing of DE2_70
Date : 2025-11-23 Size : 44kb User : 许诺
spi
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SPI with verilog source implementation can be run directly through the Quartus ~ ~
Date : 2025-11-23 Size : 321kb User : 张哲
I2S
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I2S implementation by verilog source code can be run directly through the Quartus ~ ~
Date : 2025-11-23 Size : 658kb User : 张哲
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