VHDL-FPGA-Verilog List Page 24

VHDL-FPGA-Verilog list

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BrentKung32 Downloaded：0: 32 bit brent kung adder
Date : 2025-06-25 Size : 72kb User : mdursun
flashZ Downloaded：0: SPI protocol for read and write control of m25p16 flash chip controlled by FPGA Erase Write-Read Function
Date : 2025-06-25 Size : 708kb User : SHNSHiNe
HK-2+blood type Downloaded：0: Blood type input, matching and judgment, detection and blood type of the recipient of blood matching, no safety risks, blood transfusion can be carried out
Date : 2025-06-25 Size : 578kb User : 秦王殿是否
基于xilinx fpga的pcie dma源代码 Downloaded：0: 支持 vivado spartan6 v6 k7 v7 ultrascale pcie dma源代码
Date : 2018-12-22 Size : 275.7kb User : lichen813@gmail.com
AD7760_TEST Downloaded：0: AD7760 Full Function Support with Additional Instructions
Date : 2025-06-25 Size : 34.38mb User : 沈世林
FPGA读取sd卡音频到DDR Downloaded：0: Xilinx FPGA读取sd卡音频到DDR，vivado实现
Date : 2018-12-24 Size : 17.13mb User : 393975487@qq.com
pmodkypd_demo_verilog Downloaded：0: robust PmodKYPD source code output towards digital
Date : 2025-06-25 Size : 91kb User : frozenburning
电子琴 Downloaded：1: A design of electronic organ based on FPGA, using Verilog language
Date : 2025-06-25 Size : 5.49mb User : swust_fpy
A4_Oscilloscope_Top Downloaded：0: Using DE0 Development Board and ADC, DAC to Realize Simple Spectrometer
Date : 2025-06-25 Size : 54.84mb User : 尾闪丁二皇
mips-cpu-master Downloaded：0: CPU design has been simulated
Date : 2025-06-25 Size : 38kb User : sak1tam
WM8731 Downloaded：1: The audio codec chip wm8731 is controlled by FPGA to produce a 1 kHz sinusoidal wave connected with AC620 Listen to this sinusoidal wave with the earphone interface on the board. (Note that the voice is louder. For insur
Date : 2025-06-25 Size : 5.23mb User : 风断了想念
曲线图坐标 Downloaded：0: 控制labview中曲线图上坐标的位置。能够自如的改变和了解曲线图上的坐标信息。
Date : 2019-01-08 Size : 32.87kb User : wyatt000

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