VHDL-FPGA-Verilog List Page 2379

VHDL-FPGA-Verilog list

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SPI Downloaded：0: the verilog for spi
Date : 2025-11-23 Size : 584kb User : 刘明
HDB3-Decoding Downloaded：0: hdb3 decoder, input 01 representative of the representative+1,10-1, the program adopted by the simulation.
Date : 2025-11-23 Size : 1kb User : 李志强
HDB3-Coding Downloaded：0: HDB3 coding procedures, able to encode common code HDB3 code, representative of the output of 11 V, 10 on behalf of B, 01 representatives on behalf of 01,00 0, the program adopted by the simulation.
Date : 2025-11-23 Size : 2kb User : 李志强
Multiplier Downloaded：0: VHDL language design of multiplier, after chamber test, with the chamber of the 8 DIP switch input numbers, key press output.
Date : 2025-11-23 Size : 2kb User : 李志强
Adder Downloaded：0: Adder VHDL language design, in the chamber using the DIP switch setting 8 to 2 to add the number of keys pressed result of the addition output of the chamber on the test.
Date : 2025-11-23 Size : 2kb User : 李志强
Marquee Downloaded：0: Marquee VHDL language design process, with 8 of the digital control, and can decrease time, time time to sound the buzzer output, data on the digital scroll in the chamber on the test.
Date : 2025-11-23 Size : 2kb User : 李志强
vhdlchufaqi Downloaded：0: This is based on VHDL language bch divider, its function is to achieve binary division, the way by shift
Date : 2025-11-23 Size : 1kb User : 刘某
air_controller Downloaded：0: aircontroller,can controll the air controller automate
Date : 2025-11-23 Size : 98kb User : 武娇娇
stop_watch Downloaded：0: stop_watch programming procedures for the moment when the stop input to stop counting, and the output from the last input clock frequency for a
Date : 2025-11-23 Size : 108kb User : 武娇娇
sqrt_Verilog Downloaded：0: sqrt with Verilog HDL. It is useful.
Date : 2025-11-23 Size : 17kb User : 张重
FPGA_ep1c3 Downloaded：0: ALTERA EP1C3 PROTEL SCH AND PCB
Date : 2025-11-23 Size : 160kb User :
moore Downloaded：0: an example of FSM of moore
Date : 2025-11-23 Size : 178kb User : 王婷

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