VHDL-FPGA-Verilog List Page 2221

VHDL-FPGA-Verilog list

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SEG_static Downloaded：0: SEG_static, 7 segment LED decoder and the main achievement of this experiment the static display 7 segment LED (common cathode) decoding. Toggle switch SW [3 .. 0] represents the input in hexadecimal, 16 decimal decoder
Date : 2025-11-24 Size : 236kb User : 王晨
Adder_2bit Downloaded：0: Adder_2bit, with carry handle 2-bit adder this experiment, the realization of the addition operation 2bit width, and bit into the handle. Addend and the summand respectively, SW [3 .. 2] and SW [1 .. 0] to indicate, with
Date : 2025-11-24 Size : 243kb User : 王晨
shifter_8bit Downloaded：0: The experimental realization of an 8-bit cyclic shift register, the shift frequency is 2Hz, the shift in the direction (left or right) control. In order to show the result of the shift, we use a digital eight segments to
Date : 2025-11-24 Size : 334kb User : 王晨
SEG_Dynamic Downloaded：0: This experiment, to achieve the 4 piece of negative dynamic digital display. The data is being displayed increasing the frequency of 2Hz. Each LED will take a decimal point in the cycle frequency of 2Hz light.
Date : 2025-11-24 Size : 407kb User : 王晨
counter Downloaded：0: This article describes the FPGA-based digital frequency meter design method using hardware description language Verilog, ISE on the complete software development platform, can be compared with high-speed clock frequency
Date : 2025-11-24 Size : 1.79mb User : PengJ
dac7513_DDS_7822 Downloaded：0: DAC7513 VHDL NCO
Date : 2025-11-24 Size : 4.93mb User : 李才
mux1 Downloaded：0: this a verilog cheng xu， cheng fa qi。mei you fang zhen
Date : 2025-11-24 Size : 613kb User : 李才
sw_led Downloaded：0: Using verilog write a code key control LED lights, including key debounce
Date : 2025-11-24 Size : 357kb User : 李才
uart_top Downloaded：0: Max232 use of FPGA-based verilog write a communication protocol,
Date : 2025-11-24 Size : 176kb User : 李才
61EDA_H174 Downloaded：0: FPGA-based chip TLV5620 DAC conversion code Verilog language
Date : 2025-11-24 Size : 299kb User : 李才
CPLD_DS18B20 Downloaded：0: CPLD-based DS18B20 temperature display program can be collected by temperature or four 16-bit digital tube LED display real-time, while lower temperature can be set to achieve the alarm buzzer (the program has been succe
Date : 2025-11-24 Size : 1.05mb User : CTK
vga_sync_800_by_600 Downloaded：0: VGA display :a syncchronous source code
Date : 2025-11-24 Size : 1kb User : rickdecent

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