VHDL-FPGA-Verilog List Page 2202

VHDL-FPGA-Verilog list

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JPEG Downloaded：0: JPEG decoding (Verilog)
Date : 2025-11-24 Size : 184kb User : 杨航
stopwatch Downloaded：0: This program achieved stopwatch function, clock display range 00.00 to 99.99 seconds Resolution: 0.01 seconds using PIC16F877 microcontroller, 6 digital display development platform: MPLAB IDE v8.30 types: project file (
Date : 2025-11-24 Size : 30kb User : jiayuan
sc2mig Downloaded：0: Bridge Xilinx MIG - JOP SimpCon
Date : 2025-11-24 Size : 2kb User : Strijar
Encoder-Frequency-Doubling- Downloaded：0: Fixed on the spindle encoder pulse frequency, the first 4x, then N frequency, requiring speed fluctuation is small, containing a reference
Date : 2025-11-24 Size : 802kb User : 周振亮
mimasuo Downloaded：0: Digital lock design basic requirements: (1) unlock password is four decimal numbers. (2) Press any key, the system enters a wait state, 0000, at this time if the password input by four key will now add a line of input da
Date : 2025-11-24 Size : 321kb User : chenpeibei
shuzizhong Downloaded：0: Digital clock, a calendar, stopwatch, alarm clock function. Details see the program now! Written two years ago do not remember, we will, in short, the program is certainly possible
Date : 2025-11-24 Size : 470kb User : chenpeibei
CPU Downloaded：0: This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program. For simplicity, we will only consider the relationship among the CPU, registers, memory and instruction set.
Date : 2025-11-24 Size : 341kb User : 李楠
POC Downloaded：0: An I/O module is the entity within a computer responsible for the control of one or more external devices and for the exchange of data between those devices and main memory and CPU registers. Thus, the I/O module acts as
Date : 2025-11-24 Size : 1.69mb User : 李楠
trafficlight Downloaded：0: failed to translate
Date : 2025-11-24 Size : 132kb User : 李楠
eeprom-model Downloaded：0: eeprom model based on FPGA
Date : 2025-11-24 Size : 577kb User :
cyclone-handbook Downloaded：0: the cyclone handbook of altera s fpga，specifically introduced this fpga chip
Date : 2025-11-24 Size : 3.14mb User :
AMI Downloaded：0: In the ISE software environment, using Verilog HDL language for communication in the AMI code encoding and decoding, and a simulation waveform.
Date : 2025-11-24 Size : 235kb User : xuwen

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