VHDL-FPGA-Verilog List Page 2099

VHDL-FPGA-Verilog list

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frequence Downloaded：0: Verilog language based on the frequency meter, junior, when written, I feel good, oh
Date : 2025-11-23 Size : 196kb User : 韦增益
n_evendivider Downloaded：0: Divider odd, even divider.It divide clock into odd and even frequency.
Date : 2025-11-23 Size : 224kb User : Tony
v Downloaded：0: Write Verilog code for the second divider circuit, FPGA, to achieve the frequency of the input clock signal into the original 1/2
Date : 2025-11-23 Size : 6kb User : wudong
up51s010 Downloaded：0: Microcontroller development, AT89S52 counter applet
Date : 2025-11-23 Size : 24kb User : 钟
PWM_xinhaofashengqi Downloaded：0: Based on Freescale' s microcontroller, using the PWM module output square wave 1khz
Date : 2025-11-23 Size : 192kb User : lyq
Keypad-lock Downloaded：0: 4 x 4 with Keyboard and Sunplus A board prepared a four-digit PIN keyboard lock keyboard lock
Date : 2025-11-23 Size : 26kb User : liuzhisheng
LCD-Clock Downloaded：0: 1602 and Ling Yang A board prepared with a LCD electronic clock electronic clock, the clock function can be simple
Date : 2025-11-23 Size : 46kb User : liuzhisheng
LED-electronic-clock Downloaded：0: A digital control and Sunplus board for electronic clock electronic clock, time can be adjusted with two buttons
Date : 2025-11-23 Size : 41kb User : liuzhisheng
UART-LCD12864 Downloaded：0: Sunplus A board serial communication, use of single-chip receiver display code 12864
Date : 2025-11-23 Size : 51kb User : liuzhisheng
key Downloaded：0: Electronic locks, 4* 4 matrix keyboard, digital liquid crystal display module
Date : 2025-11-23 Size : 124kb User : jiangweiyu
LED_UART Downloaded：0: Introduced before the beginning of the UART, interrupt the use of, and how to handle UART receive a signal and
Date : 2025-11-23 Size : 2kb User : 钱水兵
RS232 Downloaded：0: RS232 application header file, declare the beginning of the program, you can use when initializing
Date : 2025-11-23 Size : 2kb User : 崔兴东

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