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VHDL-FPGA-Verilog list
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jtag_uart
Downloaded:0
Jtag-uart IP core in SOPC
Date
: 2025-09-19
Size
: 5kb
User
:
zy
epcs
Downloaded:0
EPCS IP core in SOPC
Date
: 2025-09-19
Size
: 4kb
User
:
zy
TIMER
Downloaded:0
timer ip core in SOPC
Date
: 2025-09-19
Size
: 2kb
User
:
zy
PLL
Downloaded:0
pll ip core in SOPC
Date
: 2025-09-19
Size
: 3kb
User
:
zy
altera_avalon_spi
Downloaded:0
Altera NIOS II uart DRIVER
Date
: 2025-09-19
Size
: 7kb
User
:
zy
sclock
Downloaded:0
Verilog implementation of a stopwatch program
Date
: 2025-09-19
Size
: 94kb
User
:
Q24DTU-hardware-design
Downloaded:0
Q24DTU hardware design, hardware design for the Q24 fu
Date
: 2025-09-19
Size
: 130kb
User
:
刘小瑜
Avalon---TFT-LCD-
Downloaded:0
Avalon bus-based controller design of TFT LCD
Date
: 2025-09-19
Size
: 140kb
User
:
刘小瑜
CABAC-FPGA
Downloaded:0
CABAC to achieve this is to introduce the information of the FPGA implementation
Date
: 2025-09-19
Size
: 2.53mb
User
:
钟普
JPEG2000MQ
Downloaded:0
This achieved JPEG2000MQ encoding the file, you need to download
Date
: 2025-09-19
Size
: 580kb
User
:
钟普
mygui_v6
Downloaded:0
In NiosII system successfully transplanted the uc/GUI3.98.The used hardwares conclude DE2 development board and TRDB-LTM.It s display resolution is 400* 240,and the color model is 332, it also can be touched.
Date
: 2025-09-19
Size
: 14.32mb
User
:
feng
EDA
Downloaded:0
EDA test sequence signal detector and variable-counter model, project files and VHDL files
Date
: 2025-09-19
Size
: 893kb
User
:
邓泽林
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