VHDL-FPGA-Verilog List Page 1933

VHDL-FPGA-Verilog list

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22222222222222222 Downloaded：0: FPGA-based digital receiver design, someone else' s master' s thesis, think better
Date : 2025-09-18 Size : 2.66mb User : 田永毅
Conversion Downloaded：0: pipeline test in verilog
Date : 2025-09-18 Size : 1kb User : buni
8051_hex_dec_conv Downloaded：0: 8051 Assembler. hex to dec conversions.
Date : 2025-09-18 Size : 1kb User : Afonso
8051_Serial_INT_RECEIVE Downloaded：0: 8051 Assembler using Serial Receive Interrupt
Date : 2025-09-18 Size : 2kb User : Afonso
electronic-lock-and-VHDL-design Downloaded：0: Based on Max+ Plus II electronic lock and VHDL design
Date : 2025-09-18 Size : 1kb User : 于春秀
vga_lcd_latest.tar Downloaded：0: This embedded VGA core capable of driving CRT and LCD displays. It supports user programmable resolutions and video timings, which are limited only by the available WISHBONE bandwidth. Making it compatible with almost al
Date : 2025-09-18 Size : 1.71mb User : 安隹亚
USB2I2C Downloaded：0: Visual basic USB I2C demo program
Date : 2025-09-18 Size : 148kb User : rich
zhouligong-LPC17XX-example Downloaded：0: Zhou, who LPC17XX series matching routines. Including AD, DAC, EINT.GPDMA.GPIO, I2C.IAP, PWM, QEI, RTC, SPI, SSP, TIMER, UART, memory speed, power-down wake-up, digital input, CAN, ETHERNET, USB, I2S routines. Is a good
Date : 2025-09-18 Size : 10.35mb User : 夏波
topone Downloaded：0: FPGA and PC UART communication module implemented by VHDL, running on Dragon platform, with support of LCD and LED display.
Date : 2025-09-18 Size : 19kb User : bingo
super_horse Downloaded：0: using LED for super_horse,VHDL
Date : 2025-09-18 Size : 1.83mb User : Oliver
uartverilog Downloaded：0: RS232 interface, a receiver and transmitter and the divider, a detailed description
Date : 2025-09-18 Size : 322kb User : 乘凉
ACTEL-FPGA-1602(Verilog) Downloaded：0: 1602 LCD program, written using verilog!
Date : 2025-09-18 Size : 4kb User : wns

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