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VHDL-FPGA-Verilog list
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mylab
Downloaded:0
Four data selectors choose a language VHDL source code
Date
: 2025-09-17
Size
: 27kb
User
:
cdd
codeworrior_dg128_ADC
Downloaded:0
freescale company mcu dg128 ,to test the ad interface
Date
: 2025-09-17
Size
: 221kb
User
:
中明经
codeworrior_dg128_LCD
Downloaded:0
freescale company mcu dg128 ,to test the lcd interface,and light it
Date
: 2025-09-17
Size
: 219kb
User
:
中明经
codeworrior_led_dg128
Downloaded:0
freescale company mcu dg128 ,to test the led interface
Date
: 2025-09-17
Size
: 219kb
User
:
中明经
88xianshi
Downloaded:0
8* 8 dot matrix cycle, "Electrical two refueling," according to the column by way of written procedures for scanning
Date
: 2025-09-17
Size
: 6kb
User
:
陈学虎
verilog
Downloaded:0
PCI/WISHBONE bridge Reference Design
Date
: 2025-09-17
Size
: 46kb
User
:
Sample
Downloaded:0
Through the AD9221 data collection and then will output through a serial port MAX232 shows to FPGA collection back graphics
Date
: 2025-09-17
Size
: 4.56mb
User
:
刘
rd1008_rev03.4
Downloaded:0
PCI Target
Date
: 2025-09-17
Size
: 718kb
User
:
Eleven
mimasuo
Downloaded:0
Lock, to achieve set password, the password is correct when the green light, red light error
Date
: 2025-09-17
Size
: 1.24mb
User
:
陈学虎
miaobiao
Downloaded:0
Counting stopwatch, to achieve 23 decimal count is cleared and you can change the frequency
Date
: 2025-09-17
Size
: 1.34mb
User
:
陈学虎
jiaotongdeng
Downloaded:0
Traffic light, green light after a period of change to achieve a red light, this will change to yellow between the functions, the approximate time is 40 seconds
Date
: 2025-09-17
Size
: 5kb
User
:
陈学虎
library-ieee
Downloaded:0
By-column scan to display Chinese characters. The reality of the "08 Electric 2" message. Scroll left to expand functions, controlled by a switch to scroll/red for the font part, control what you want to display Chinese
Date
: 2025-09-17
Size
: 6kb
User
:
陈学虎
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.51
.52
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.54
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1856
.57
.58
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.60
.61
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4310
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