VHDL-FPGA-Verilog List Page 1824

VHDL-FPGA-Verilog list

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ARM_ALU Downloaded：0: ARM ALU design, the VHDL file that contains the appropriate use and design of the Visio diagram.
Date : 2025-09-17 Size : 801kb User :
new_bord_TX_10bitX2_2_5G Downloaded：0: xilinx virtex2-pro project,camera-link
Date : 2025-09-17 Size : 3.5mb User : 姓名
digtal_clock Downloaded：0: digtal clock implement on fpga
Date : 2025-09-17 Size : 54kb User : mend
dds Downloaded：0: Verilog HDL-based design and simulation of DDS
Date : 2025-09-17 Size : 306kb User : mend
freq_div Downloaded：0: Divider using verilog achieve common
Date : 2025-09-17 Size : 67kb User : mend
PLL_12MHz Downloaded：0: Verilog language production with a PLL, the PLL frequency divider can be to 12MHZ, 12MHZ into the PLL output divider
Date : 2025-09-17 Size : 54kb User : 郑先生
uart Downloaded：0: XILINX reference design, uart, including modelsim test code
Date : 2025-09-17 Size : 29kb User : mend
CPLD-8051-Micorcontroller-Interface Downloaded：0: CPLD and 8051 bus interface, XILINX reference design
Date : 2025-09-17 Size : 162kb User : mend
traffic_light Downloaded：0: VHDL-based traffic lights, the state machine to achieve
Date : 2025-09-17 Size : 3kb User : mend
VHDL Downloaded：0: tUTORIAL OF VHDL IN GREEK
Date : 2025-09-17 Size : 820kb User : harris
XilinxISE8.1SynthesisTutorial_Spartan3E Downloaded：0: A USEFULL TUTORIAL FOR SYNTHESIS USING XilinxISE8.1 FOR Spartan3E FPGA BOARD
Date : 2025-09-17 Size : 1.28mb User : harris
STR_uart Downloaded：0: open ocd + eclipse str code example
Date : 2025-09-17 Size : 38kb User : idiot

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