VHDL-FPGA-Verilog List Page 1694

VHDL-FPGA-Verilog list

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myFFT2 Downloaded：0: FFT algorithm
Date : 2025-09-15 Size : 308kb User : WeiYongcheng
simpleCPU Downloaded：0: A simple multiple CPU,based on language verilog
Date : 2025-09-15 Size : 165kb User : 胡明昊
PipelineCPU Downloaded：0: A simple pipelineCPU
Date : 2025-09-15 Size : 17kb User : 胡明昊
jpegencode_latest.tar Downloaded：0: A jpeg encode source code based on verilog
Date : 2025-09-15 Size : 205kb User : 胡明昊
ps2dfe Downloaded：0: This procedure can be realized using a microcontroller instead of the ps2 keyboard to the computer input data
Date : 2025-09-15 Size : 7kb User : 8137268
pcjk Downloaded：0: Computer interface description PS2 VGA SATA
Date : 2025-09-15 Size : 204kb User : 8137268
VMMing_Testbench_by_Example Downloaded：0: a systemverilog testbench for v
Date : 2025-09-15 Size : 710kb User : ssss
3or5-devided-frequency Downloaded：0: implement the devided five frequency
Date : 2025-09-15 Size : 5kb User : ssss
4BCDcodeaddition Downloaded：0: 4 bit BCD coded decimal addition calculations
Date : 2025-09-15 Size : 2kb User : 小卒
vga_display Downloaded：0: VGA connector on the DE2 board design, the display of static images
Date : 2025-09-15 Size : 1.16mb User : jie
key_test Downloaded：0: verilog HDL the quartusii environment in the 24 seconds countdown code
Date : 2025-09-15 Size : 1kb User : 马海林
uart_led Downloaded：0: 9600 baud rate control of small01,02 each on a bright,03, other is not bright.
Date : 2025-09-15 Size : 1.38mb User : 陈拓

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