VHDL-FPGA-Verilog List Page 1562

VHDL-FPGA-Verilog list

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FIFO Downloaded：0: Synchronous FIFO and asynchronous FIFO, and dual-port RAM within the FPGA design,FIFO design rule of thumb, very classic.
Date : 2025-09-13 Size : 2.28mb User : peter
AM2901 Downloaded：0: 2bit am2901
Date : 2025-09-13 Size : 3kb User : shenzhexue
Numberical-Controlled-Oscillator Downloaded：0: NCO desgin: accumulator_precision.mdl frequency_resolution.mdl generating_a_ramp.mdl lutdepth_cost_a.mdl lutdepth_cost_b.mdl lutdepth_cost_c.mdl sine_wave.mdl sine_wave_iir.mdl sine_wave_iir_8bit.mdl sine_wave_iir_12bit.
Date : 2025-09-13 Size : 105kb User :
five Downloaded：0: Incorporated into the string to the register to complete the two-way with asynchronous clear and synchronous clock so that the VHDL description of the four adder energy and waveform simulation to determine the correct r
Date : 2025-09-13 Size : 10kb User : qsp
shuziCLOCK Downloaded：0: the clock for FPGA
Date : 2025-09-13 Size : 754kb User : 汪中
lock Downloaded：0: 4 of VHDL-based electronic lock, password input, change, lock and unlock. Password input and output are serial.
Date : 2025-09-13 Size : 2.36mb User : bo
copy_DDS Downloaded：0: Based on FPGA programming DDS do, can produce four waveform, sine wave, square, triangle wave, adjustable amplitude, phase.
Date : 2025-09-13 Size : 1.86mb User : wenson
fft256 Downloaded：0: Provided by quartusII the FFT IPcore design 256 FFT with testbench file
Date : 2025-09-13 Size : 43.69mb User : Wide
spi_flash Downloaded：0: EDK in the FPGA to read and write operations of spi_flash procedure applies to the flash model N25Q128 , of course, modify the header files in the flash parameters can be used for other flash
Date : 2025-09-13 Size : 6kb User : 于习
jiaotd Downloaded：0: Vhdl series of traffic lights program. . Normal circumstances the intersection of the rotation passage (main road 3 LED red, yellow, green control straight, Road 3 LED red, yellow, green) and requested the main road to r
Date : 2025-09-13 Size : 379kb User : jackychen
schk Downloaded：0: Familiar with the various sequence detector state machine design thinking and to use the state machine to achieve the design of the sequence detector
Date : 2025-09-13 Size : 235kb User : jackychen
DEVICE_DNA Downloaded：0: The module is DEVICE_DNA read module, up top, add the module, the module is called to read the DEVICE DNA
Date : 2025-09-13 Size : 2kb User : zhang

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