VHDL-FPGA-Verilog List Page 117

VHDL-FPGA-Verilog list

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equalizer Downloaded：0: matlab code for ZF equalizer
Date : 2025-05-18 Size : 1kb User : MJSO
library ieee Downloaded：0: Four modes: a total of six lights 1 from the left to the right 2 from right to left, 3 from the middle to the two sides to the middle 4from both sides to the middle
Date : 2025-05-18 Size : 11kb User : 老狼1996
predictive control Downloaded：0: Predictive control based on FPGA control chip and a complete control system
Date : 2025-05-18 Size : 324kb User : lxshen
microblaze_GPIO Downloaded：0: GPIO IPcore program for soft core MicroBlaze based on Xilinx
Date : 2025-05-18 Size : 60.98mb User : kristen123
IEEE Standard for Verilog 2005 Downloaded：0: this book introduces the use of Verilog HDL.
Date : 2025-05-18 Size : 2.99mb User : ^U^
夏宇闻数字逻辑设计 Downloaded：0: digital logic design
Date : 2025-05-18 Size : 1.57mb User : ^U^
VHDL语言100例详解 Downloaded：0: VHDL language 100 examples
Date : 2025-05-18 Size : 6.33mb User : ^U^
VHDL-和-Verilog-HDL-的区别 Downloaded：0: The difference between VHDL and Verilog HDL.
Date : 2025-05-18 Size : 1kb User : ^U^
16位超前进位加法器 Downloaded：0: 16 bit forward adder
Date : 2025-05-18 Size : 112kb User : nvde
Verilog HDL使用中该注意的问题及一些模块代码 Downloaded：0: cpu simulated,but no one can get 20 words in this short file how can I do? just tell you the simulated file and vivado system is 2015
Date : 2025-05-18 Size : 196kb User : momotou
计算器 Downloaded：0: Using Verilog language to achieve a simple calculator ALU, computing add, subtract, multiply and divide.
Date : 2025-05-18 Size : 1kb User : 哈皮Q
SHA256_SYSTEM Downloaded：0: The hardware (programmable logic device FPGA) is used to implement the cryptographic algorithm SHA256, and the soft core NIOSii is embedded in the FPGA, and the software is programmed on the NIOSii. The hardware EDA tool
Date : 2025-05-18 Size : 4.21mb User : 风@筝

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