Search - vhdl uart code

[VHDL-FPGA-Verilog] u-uart

Description: 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
Platform: | Size: 5120 | Author: 李文文 | Hits:

[VHDL-FPGA-Verilog] uartvhdl

Description: 一个在FPGA芯片上实现UART功能的vhdl源代码，提供了UART的集成-an FPGA chip to achieve UART function vhdl source code, providing integrated UART
Platform: | Size: 10240 | Author: 王利 | Hits:

[VHDL-FPGA-Verilog] uart-verilog-vhdl

Description: 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
Platform: | Size: 294912 | Author: 刘索山 | Hits:

Description: uart的VHDL源代码，包括intface.VHD UART_RX_TAB.VHD UART_INT_TB.VHD等-uart VHDL source code, including intface.VHD UART_RX_TAB.VHD UART_INT_TB. Volume etc.
Platform: | Size: 43008 | Author: 罗辉 | Hits:

[VHDL-FPGA-Verilog] URATVHDLDocument

Description: 用VHDL描述uart后整理的文档，很全面，代码注释很详细-Described using VHDL UART finishing the document, very comprehensive and very detailed code Notes
Platform: | Size: 54272 | Author: ninghuiming | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl书写uart代码,经验证功能非常的全.-UART code written in VHDL, experience card features a very wide.
Platform: | Size: 405504 | Author: zjc | Hits:

[VHDL-FPGA-Verilog] UART232

Description: 本代码是用VHDL语言全面、系统地描述UART通信协议标准，通过对UART进行数据通信的实际运用，能够较全面地理解和掌握VHDL和UART协议。-The VHDL language code is a comprehensive, systematic description of UART communication protocol standards, through the UART to the practical application of data communications, to more fully understand and grasp the VHDL and the UART protocol.
Platform: | Size: 22528 | Author: fengxinya | Hits:

[Com Port] uart

Description: 开源的串口通信程序，用vhdl 编写的，已通过测试，在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run.
Platform: | Size: 2048 | Author: caijl88 | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
Platform: | Size: 5120 | Author: 陈想 | Hits:

[Com Port] uart

Description: this a Uart source code using Verilog.
Platform: | Size: 10240 | Author: Daniel Zhang | Hits:

[VHDL-FPGA-Verilog] uart

Description: VHDL编写的异步通信串行口设计用Quartus工具编译-VHDL prepared the design of serial asynchronous communication tool used Quartus compiler
Platform: | Size: 212992 | Author: 朱兆斌 | Hits:

[SCM] new-lins-uart-all

Description: 无私奉献，VHDL 源码，用于实现FPGA上的UART(串口控制器)，可以实现FPGA与单片机，PC机的串口通讯。-Selfless dedication, VHDL source code for the FPGA realization of the UART (serial port controller), you can realize FPGA and MCU, PC serial communication machine.
Platform: | Size: 6144 | Author: 骑士 | Hits:

[VHDL-FPGA-Verilog] uart_serial

Description: UART接口的VHDL源代码，成功应用于SOC项目开发中，请勿用于商业用途。-UART interface of the VHDL source code, successfully applied in the development of SOC projects, not for commercial purposes.
Platform: | Size: 12288 | Author: xiaojian | Hits:

[Com Port] uart(Verilog)

Description: RS232的verilog源代码,如果需要的可以-RS232 of Verilog source code, if necessary can be
Platform: | Size: 10240 | Author: 陈强 | Hits:

[VHDL-FPGA-Verilog] uart(Verilog)

Description: uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
Platform: | Size: 10240 | Author: 阿军 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 串口实验，很好用，我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
Platform: | Size: 338944 | Author: 韩思贤 | Hits:

[VHDL-FPGA-Verilog] miniUART

Description: 自适应波特率的通用异步串行接口电路（ＵＡＲＴ）的ＶＨＤＬ源码，在ＡＬＴＥＲＡ上运行成功-Adaptive baud rate of the universal asynchronous serial interface circuit (UART) the VHDL source code, to run successfully in ALTERA
Platform: | Size: 9216 | Author: 甘甜 | Hits:

[Com Port] UART

Description: 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:

[VHDL-FPGA-Verilog] Uart

Description: Uart总线，VHDL语言，硬件描述语言源码-Uart bus, VHDL language, VHDL source code
Platform: | Size: 10240 | Author: 陳皇仁 | Hits:

[Other] uart

Description: UART串口的VHDL源程序，希望对大家有用-UART serial port of the VHDL source code, we want to be useful
Platform: | Size: 17408 | Author: 贾明 | Hits:

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[VHDL-FPGA-Verilog] u-uart

[VHDL-FPGA-Verilog] uartvhdl

[VHDL-FPGA-Verilog] uart-verilog-vhdl

[VHDL-FPGA-Verilog] Uart2

[VHDL-FPGA-Verilog] URATVHDLDocument

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART232

[Com Port] uart

[VHDL-FPGA-Verilog] uart

[Com Port] uart

[VHDL-FPGA-Verilog] uart

[SCM] new-lins-uart-all

[VHDL-FPGA-Verilog] uart_serial

[Com Port] uart(Verilog)

[VHDL-FPGA-Verilog] uart(Verilog)

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] miniUART

[Com Port] UART

[VHDL-FPGA-Verilog] Uart

[Other] uart

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