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[Other resource] 八位的伪随机数产生的verilog文件

Description: 八位的伪随机数产生的verilog文件linear-feedback-shift-register-eight pseudo-random number generator in Verilog document linear-feedback - shift-register
Platform: | Size: 1837 | Author: 陈正一 | Hits:

[Communication] 伪随机序列

Description: 线形反馈移位寄存器（LFSR)是数字系统中一个重要的结构，本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and circuit schematics. Procedures can run on platforms win98/2000/NT
Platform: | Size: 162816 | Author: 夏沫 | Hits:

[VHDL-FPGA-Verilog] 八位的伪随机数产生的verilog文件

Description: 八位的伪随机数产生的verilog文件linear-feedback-shift-register-eight pseudo-random number generator in Verilog document linear-feedback- shift-register
Platform: | Size: 2048 | Author: 陈正一 | Hits:

[VHDL-FPGA-Verilog] Serial_CRC

Description: CRC校验串行实现方法,verilog源码,利用反馈线性移位寄存器的方法,实现简单,适用于串行通信协议中的CRC校验.-CRC checksum method of serial realize, verilog source code, the use of linear feedback shift register method, the realization of simple serial communication protocol for the CRC checksum.
Platform: | Size: 1024 | Author: 徐亮 | Hits:

[VHDL-FPGA-Verilog] LFSR

Description: 自动生成线形反馈移位寄存器的各种HDL源代码和原理图的工具-Automatic generation of linear feedback shift register of a variety of HDL source code and schematic tools
Platform: | Size: 162816 | Author: zx | Hits:

[Crack Hack] lfsr

Description: 伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
Platform: | Size: 1024 | Author: 李辛 | Hits:

[VHDL-FPGA-Verilog] shifter

Description: 8位双向移位寄存器: 实现串行数据与并行数据的转换,移位寄存数据功能的-8-bit bi-directional shift register: the realization of serial data and parallel data conversion, data storage function of displacement
Platform: | Size: 45056 | Author: 罗子 | Hits:

[Other Embeded program] ShiftRegister

Description: Shift register verilog code
Platform: | Size: 1024 | Author: selcuk | Hits:

[VHDL-FPGA-Verilog] shift_register

Description: 用Verilog实现的移位寄存器，可以实现左移、右移等功能-Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions
Platform: | Size: 3072 | Author: huhahuha | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: 用verilog HDL语言，通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试 -Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
Platform: | Size: 1024 | Author: 空 | Hits:

[VHDL-FPGA-Verilog] shift_reg

Description: shift register. vhdl verilog
Platform: | Size: 1024 | Author: shezzzz | Hits:

[VHDL-FPGA-Verilog] shift_regeister

Description: 用blockram实现移位寄存器，开发语言为verilog hdl-Shift register with blockram achieve the development language for the verilog hdl
Platform: | Size: 148480 | Author: 郭淮 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 文件包含了寄存器，移位寄存器，可能计数器，计数器等用VHDL实现的功能模块。-File contains the register, shift register, may counter, counter, implemented with the VHDL modules.
Platform: | Size: 4096 | Author: 朱向南 | Hits:

[VHDL-FPGA-Verilog] register-vcode

Description: shift register verilog code
Platform: | Size: 6144 | Author: praveen | Hits:

[VHDL-FPGA-Verilog] Shift-register

Description: 两种移位寄存器——通用和桶形移位寄存器，用硬件描述语言Verilog编写，适合初学者。-Two kinds of shift register- common and barrel shift register in Verilog hardware description language, suitable for beginners
Platform: | Size: 2048 | Author: 李菲 | Hits:

[Other] shift-register-and-testbench

Description: Shift register and testbench in verilog
Platform: | Size: 1024 | Author: pravat | Hits:

[Other] 64bit-shift-register-in-verilog

Description: Verilog based 64 bit shift register design
Platform: | Size: 1024 | Author: Pravat | Hits:

[VHDL-FPGA-Verilog] shift-register

Description: FPGA/CPLD 的verilog移位寄存器代码。-verilog shift register code.
Platform: | Size: 1024 | Author: john | Hits:

[LabView] shift register

Description: shift register with verilog
Platform: | Size: 944 | Author: mamine2ia | Hits:

[assembly language] Verilog源代码

Description: 多种基本功能的Verilog代码实现，包括多路选择器，二进制到BCD码转换，二进制到格雷码转换，7段译码器，8位数据锁存器，移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit data latch, shift register and many other functions.)
Platform: | Size: 18432 | Author: MMK1 | Hits:
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