shift_register Using Verilog implementation of the

Title: shift_register

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
3kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
microe_ljk

Description: Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions

Downloaders recently: [More information of uploader microe_ljk]

To Search: verilog shif verilog shift register shift_register

[Arbiter] - Arbiter.v Verilog achieve three road req
[codeofvhdl2006] - [ Classics design ] the VHDL source cod
[sram] - SRAM read and write small programs using
[shift_register_testbench] - 16 of the shift register and testbench,
[shifter] - Bidirectional controllable shift registe
[Hardware_Description_Language_Verilog(Version4).ra] - Chinese name is: Hardware Description La
[verilog] - serial
[UniversalRegister] - This design is a universal register whic
[shifter] - verilog to achieve a " parallel inpu
[left_shift_register] - With the EDA to achieve a preset functio

File list (Check if you may need any files):

exercise-6
..........\file.shm
..........\........\file.dsn
..........\........\file.trn
..........\shift_register.v
..........\test.v
..........\verilog.log

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